Next: M68K-Chars, Up: M68K-opcodes

##### 9.20.6.1 Branch Improvement

Certain pseudo opcodes are permitted for branch instructions. They expand to the shortest branch instruction that reach the target. Generally these mnemonics are made by substituting j for b at the start of a Motorola mnemonic.

The following table summarizes the pseudo-operations. A `*` flags cases that are more fully described after the table:

                   Displacement
                   +------------------------------------------------------------
                   |                68020           68000/10, not PC-relative OK
         Pseudo-Op |BYTE    WORD    LONG            ABSOLUTE LONG JUMP    **
                   +------------------------------------------------------------
              jbsr |bsrs    bsrw    bsrl            jsr
               jra |bras    braw    bral            jmp
         *     jXX |bXXs    bXXw    bXXl            bNXs;jmp
         *    dbXX | N/A    dbXXw   dbXX;bras;bral  dbXX;bras;jmp
              fjXX | N/A    fbXXw   fbXXl            N/A

         XX: condition
         NX: negative of condition XX

`*`—see full description below
`**`—this expansion mode is disallowed by --pcrel

`jbsr`
`jra`
  These are the simplest jump pseudo-operations; they always map to one particular machine instruction, depending on the displacement to the branch target. This instruction will be a byte or word branch is that is sufficient. Otherwise, a long branch will be emitted if available. If no long branches are available and the --pcrel option is not given, an absolute long jump will be emitted instead. If no long branches are available, the --pcrel option is given, and a word branch cannot reach the target, an error message is generated.

  In addition to standard branch operands, `as` allows these pseudo-operations to have all operands that are allowed for jsr and jmp, substituting these instructions if the operand given is not valid for a branch instruction.

`j` XX
  Here, j XX stands for an entire family of pseudo-operations, where XX is a conditional branch or condition-code test. The full list of pseudo-ops in this family is:

                 jhi   jls   jcc   jcs   jne   jeq   jvc
                 jvs   jpl   jmi   jge   jlt   jgt   jle

  Usually, each of these pseudo-operations expands to a single branch instruction. However, if a word branch is not sufficient, no long branches are available, and the --pcrel option is not given, `as` issues a longer code fragment in terms of NX, the opposite condition to XX. For example, under these conditions:

                    jXX foo

  gives

                     bNXs oof
                     jmp foo
                 oof:

`db` XX
  The full family of pseudo-operations covered here is

                 dbhi   dbls   dbcc   dbcs   dbne   dbeq   dbvc
                 dbvs   dbpl   dbmi   dbge   dblt   dbgt   dble
                 dbf    dbra   dbt

  Motorola db XX instructions allow word displacements only. When a word displacement is sufficient, each of these pseudo-operations expands to the corresponding Motorola instruction. When a word displacement is not sufficient and long branches are available, when the source reads db XX foo, `as` emits

                     dbXX oo1
                     bras oo2
                 oo1:bral foo
                 oo2:

  If, however, long branches are not available and the --pcrel option is not given, `as` emits

                     dbXX oo1
                     bras oo2
                 oo1:jmp foo
                 oo2:

`fj` XX
  This family includes

                 fjne   fjeq   fjge   fjlt   fjgt   fjle   fjf
                 fjt    fjgl   fjgle  fjnge  fjngl  fjngle fjngt
                 fjnle  fjnlt  fjoge  fjogl  fjogt  fjole  fjolt
                 fjor   fjseq  fjsf   fjsne  fjst   fjueq  fjuge
                 fjugt  fjule  fjult  fjun

  Each of these pseudo-operations always expands to a single Motorola coprocessor branch instruction, word or long. All Motorola coprocessor branch instructions allow both word and long displacements.