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281 lines
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<title>ARM Options - Using as</title>
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<meta name="description" content="Using as">
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<link title="Top" rel="start" href="index.html#Top">
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<link rel="up" href="ARM_002dDependent.html#ARM_002dDependent" title="ARM-Dependent">
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<link rel="next" href="ARM-Syntax.html#ARM-Syntax" title="ARM Syntax">
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<link href="http://www.gnu.org/software/texinfo/" rel="generator-home" title="Texinfo Homepage">
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<!--
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This file documents the GNU Assembler "as".
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Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002,
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2006, 2007 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 1.1
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or any later version published by the Free Software Foundation;
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with no Invariant Sections, with no Front-Cover Texts, and with no
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Back-Cover Texts. A copy of the license is included in the
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section entitled ``GNU Free Documentation License''.
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man end-->
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--></style>
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</head>
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<body>
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<div class="node">
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<p>
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<a name="ARM-Options"></a>Next: <a rel="next" accesskey="n" href="ARM-Syntax.html#ARM-Syntax">ARM Syntax</a>,
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Up: <a rel="up" accesskey="u" href="ARM_002dDependent.html#ARM_002dDependent">ARM-Dependent</a>
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<hr><br>
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</div>
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<h4 class="subsection">9.3.1 Options</h4>
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<p><a name="index-ARM-options-_0028none_0029-566"></a><a name="index-options-for-ARM-_0028none_0029-567"></a>
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<a name="index-_0040code_007b_002dmcpu_003d_007d-command-line-option_002c-ARM-568"></a>
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<dl><dt><code>-mcpu=</code><var>processor</var><code>[+</code><var>extension</var><code>...]</code><dd>This option specifies the target processor. The assembler will issue an
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error message if an attempt is made to assemble an instruction which
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will not execute on the target processor. The following processor names are
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recognized:
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<code>arm1</code>,
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<code>arm2</code>,
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<code>arm250</code>,
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<code>arm3</code>,
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<code>arm6</code>,
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<code>arm60</code>,
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<code>arm600</code>,
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<code>arm610</code>,
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<code>arm620</code>,
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<code>arm7</code>,
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<code>arm7m</code>,
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<code>arm7d</code>,
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<code>arm7dm</code>,
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<code>arm7di</code>,
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<code>arm7dmi</code>,
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<code>arm70</code>,
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<code>arm700</code>,
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<code>arm700i</code>,
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<code>arm710</code>,
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<code>arm710t</code>,
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<code>arm720</code>,
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<code>arm720t</code>,
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<code>arm740t</code>,
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<code>arm710c</code>,
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<code>arm7100</code>,
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<code>arm7500</code>,
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<code>arm7500fe</code>,
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<code>arm7t</code>,
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<code>arm7tdmi</code>,
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<code>arm7tdmi-s</code>,
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<code>arm8</code>,
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<code>arm810</code>,
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<code>strongarm</code>,
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<code>strongarm1</code>,
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<code>strongarm110</code>,
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<code>strongarm1100</code>,
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<code>strongarm1110</code>,
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<code>arm9</code>,
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<code>arm920</code>,
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<code>arm920t</code>,
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<code>arm922t</code>,
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<code>arm940t</code>,
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<code>arm9tdmi</code>,
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<code>fa526</code> (Faraday FA526 processor),
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<code>fa626</code> (Faraday FA626 processor),
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<code>arm9e</code>,
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<code>arm926e</code>,
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<code>arm926ej-s</code>,
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<code>arm946e-r0</code>,
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<code>arm946e</code>,
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<code>arm946e-s</code>,
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<code>arm966e-r0</code>,
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<code>arm966e</code>,
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<code>arm966e-s</code>,
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<code>arm968e-s</code>,
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<code>arm10t</code>,
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<code>arm10tdmi</code>,
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<code>arm10e</code>,
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<code>arm1020</code>,
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<code>arm1020t</code>,
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<code>arm1020e</code>,
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<code>arm1022e</code>,
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<code>arm1026ej-s</code>,
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<code>fa626te</code> (Faraday FA626TE processor),
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<code>fa726te</code> (Faraday FA726TE processor),
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<code>arm1136j-s</code>,
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<code>arm1136jf-s</code>,
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<code>arm1156t2-s</code>,
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<code>arm1156t2f-s</code>,
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<code>arm1176jz-s</code>,
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<code>arm1176jzf-s</code>,
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<code>mpcore</code>,
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<code>mpcorenovfp</code>,
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<code>cortex-a8</code>,
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<code>cortex-a9</code>,
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<code>cortex-r4</code>,
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<code>cortex-m3</code>,
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<code>ep9312</code> (ARM920 with Cirrus Maverick coprocessor),
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<code>i80200</code> (Intel XScale processor)
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<code>iwmmxt</code> (Intel(r) XScale processor with Wireless MMX(tm) technology coprocessor)
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and
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<code>xscale</code>.
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The special name <code>all</code> may be used to allow the
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assembler to accept instructions valid for any ARM processor.
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<p>In addition to the basic instruction set, the assembler can be told to
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accept various extension mnemonics that extend the processor using the
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co-processor instruction space. For example, <code>-mcpu=arm920+maverick</code>
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is equivalent to specifying <code>-mcpu=ep9312</code>. The following extensions
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are currently supported:
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<code>+maverick</code>
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<code>+iwmmxt</code>
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and
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<code>+xscale</code>.
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<p><a name="index-_0040code_007b_002dmarch_003d_007d-command-line-option_002c-ARM-569"></a><br><dt><code>-march=</code><var>architecture</var><code>[+</code><var>extension</var><code>...]</code><dd>This option specifies the target architecture. The assembler will issue
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an error message if an attempt is made to assemble an instruction which
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will not execute on the target architecture. The following architecture
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names are recognized:
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<code>armv1</code>,
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<code>armv2</code>,
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<code>armv2a</code>,
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<code>armv2s</code>,
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<code>armv3</code>,
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<code>armv3m</code>,
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<code>armv4</code>,
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<code>armv4xm</code>,
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<code>armv4t</code>,
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<code>armv4txm</code>,
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<code>armv5</code>,
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<code>armv5t</code>,
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<code>armv5txm</code>,
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<code>armv5te</code>,
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<code>armv5texp</code>,
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<code>armv6</code>,
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<code>armv6j</code>,
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<code>armv6k</code>,
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<code>armv6z</code>,
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<code>armv6zk</code>,
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<code>armv7</code>,
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<code>armv7-a</code>,
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<code>armv7-r</code>,
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<code>armv7-m</code>,
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<code>iwmmxt</code>
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and
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<code>xscale</code>.
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If both <code>-mcpu</code> and
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<code>-march</code> are specified, the assembler will use
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the setting for <code>-mcpu</code>.
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<p>The architecture option can be extended with the same instruction set
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extension options as the <code>-mcpu</code> option.
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<p><a name="index-_0040code_007b_002dmfpu_003d_007d-command-line-option_002c-ARM-570"></a><br><dt><code>-mfpu=</code><var>floating-point-format</var><dd>
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This option specifies the floating point format to assemble for. The
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assembler will issue an error message if an attempt is made to assemble
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an instruction which will not execute on the target floating point unit.
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The following format options are recognized:
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<code>softfpa</code>,
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<code>fpe</code>,
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<code>fpe2</code>,
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<code>fpe3</code>,
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<code>fpa</code>,
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<code>fpa10</code>,
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<code>fpa11</code>,
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<code>arm7500fe</code>,
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<code>softvfp</code>,
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<code>softvfp+vfp</code>,
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<code>vfp</code>,
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<code>vfp10</code>,
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<code>vfp10-r0</code>,
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<code>vfp9</code>,
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<code>vfpxd</code>,
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<code>vfpv2</code>
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<code>vfpv3</code>
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<code>vfpv3-d16</code>
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<code>arm1020t</code>,
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<code>arm1020e</code>,
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<code>arm1136jf-s</code>,
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<code>maverick</code>
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and
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<code>neon</code>.
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<p>In addition to determining which instructions are assembled, this option
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also affects the way in which the <code>.double</code> assembler directive behaves
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when assembling little-endian code.
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<p>The default is dependent on the processor selected. For Architecture 5 or
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later, the default is to assembler for VFP instructions; for earlier
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architectures the default is to assemble for FPA instructions.
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<p><a name="index-_0040code_007b_002dmthumb_007d-command-line-option_002c-ARM-571"></a><br><dt><code>-mthumb</code><dd>This option specifies that the assembler should start assembling Thumb
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instructions; that is, it should behave as though the file starts with a
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<code>.code 16</code> directive.
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<p><a name="index-_0040code_007b_002dmthumb_002dinterwork_007d-command-line-option_002c-ARM-572"></a><br><dt><code>-mthumb-interwork</code><dd>This option specifies that the output generated by the assembler should
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be marked as supporting interworking.
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<p><a name="index-_0040code_007b_002dmapcs_007d-command-line-option_002c-ARM-573"></a><br><dt><code>-mapcs [26|32]</code><dd>This option specifies that the output generated by the assembler should
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be marked as supporting the indicated version of the Arm Procedure.
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Calling Standard.
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<p><a name="index-_0040code_007b_002dmatpcs_007d-command-line-option_002c-ARM-574"></a><br><dt><code>-matpcs</code><dd>This option specifies that the output generated by the assembler should
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be marked as supporting the Arm/Thumb Procedure Calling Standard. If
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enabled this option will cause the assembler to create an empty
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debugging section in the object file called .arm.atpcs. Debuggers can
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use this to determine the ABI being used by.
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<p><a name="index-_0040code_007b_002dmapcs_002dfloat_007d-command-line-option_002c-ARM-575"></a><br><dt><code>-mapcs-float</code><dd>This indicates the floating point variant of the APCS should be
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used. In this variant floating point arguments are passed in FP
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registers rather than integer registers.
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<p><a name="index-_0040code_007b_002dmapcs_002dreentrant_007d-command-line-option_002c-ARM-576"></a><br><dt><code>-mapcs-reentrant</code><dd>This indicates that the reentrant variant of the APCS should be used.
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This variant supports position independent code.
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<p><a name="index-_0040code_007b_002dmfloat_002dabi_003d_007d-command-line-option_002c-ARM-577"></a><br><dt><code>-mfloat-abi=</code><var>abi</var><dd>This option specifies that the output generated by the assembler should be
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marked as using specified floating point ABI.
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The following values are recognized:
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<code>soft</code>,
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<code>softfp</code>
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and
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<code>hard</code>.
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<p><a name="index-_0040code_007b_002deabi_003d_007d-command-line-option_002c-ARM-578"></a><br><dt><code>-meabi=</code><var>ver</var><dd>This option specifies which EABI version the produced object files should
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conform to.
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The following values are recognized:
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<code>gnu</code>,
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<code>4</code>
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and
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<code>5</code>.
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<p><a name="index-_0040code_007b_002dEB_007d-command-line-option_002c-ARM-579"></a><br><dt><code>-EB</code><dd>This option specifies that the output generated by the assembler should
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be marked as being encoded for a big-endian processor.
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<p><a name="index-_0040code_007b_002dEL_007d-command-line-option_002c-ARM-580"></a><br><dt><code>-EL</code><dd>This option specifies that the output generated by the assembler should
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be marked as being encoded for a little-endian processor.
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<p><a name="index-_0040code_007b_002dk_007d-command-line-option_002c-ARM-581"></a><a name="index-PIC-code-generation-for-ARM-582"></a><br><dt><code>-k</code><dd>This option specifies that the output of the assembler should be marked
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as position-independent code (PIC).
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<p><a name="index-_0040code_007b_002d_002dfix_002dv4bx_007d-command-line-option_002c-ARM-583"></a><br><dt><code>--fix-v4bx</code><dd>Allow <code>BX</code> instructions in ARMv4 code. This is intended for use with
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the linker option of the same name.
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</dl>
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</body></html>
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