You cannot select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
91 lines
4.5 KiB
HTML
91 lines
4.5 KiB
HTML
15 years ago
|
<html lang="en">
|
||
|
|
<head>
|
||
|
|
<title>Xtensa Automatic Alignment - Using as</title>
|
||
|
|
<meta http-equiv="Content-Type" content="text/html">
|
||
|
|
<meta name="description" content="Using as">
|
||
|
|
<meta name="generator" content="makeinfo 4.7">
|
||
|
|
<link title="Top" rel="start" href="index.html#Top">
|
||
|
|
<link rel="up" href="Xtensa-Optimizations.html#Xtensa-Optimizations" title="Xtensa Optimizations">
|
||
|
|
<link rel="prev" href="Density-Instructions.html#Density-Instructions" title="Density Instructions">
|
||
|
|
<link href="http://www.gnu.org/software/texinfo/" rel="generator-home" title="Texinfo Homepage">
|
||
|
|
<!--
|
||
|
|
This file documents the GNU Assembler "as".
|
||
|
|
|
||
|
|
Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002,
|
||
|
|
2006, 2007 Free Software Foundation, Inc.
|
||
|
|
|
||
|
|
Permission is granted to copy, distribute and/or modify this document
|
||
|
|
under the terms of the GNU Free Documentation License, Version 1.1
|
||
|
|
or any later version published by the Free Software Foundation;
|
||
|
|
with no Invariant Sections, with no Front-Cover Texts, and with no
|
||
|
|
Back-Cover Texts. A copy of the license is included in the
|
||
|
|
section entitled ``GNU Free Documentation License''.
|
||
|
|
|
||
|
|
man end-->
|
||
|
|
<meta http-equiv="Content-Style-Type" content="text/css">
|
||
|
|
<style type="text/css"><!--
|
||
|
|
pre.display { font-family:inherit }
|
||
|
|
pre.format { font-family:inherit }
|
||
|
|
pre.smalldisplay { font-family:inherit; font-size:smaller }
|
||
|
|
pre.smallformat { font-family:inherit; font-size:smaller }
|
||
|
|
pre.smallexample { font-size:smaller }
|
||
|
|
pre.smalllisp { font-size:smaller }
|
||
|
|
span.sc { font-variant:small-caps }
|
||
|
|
span.roman { font-family: serif; font-weight: normal; }
|
||
|
|
--></style>
|
||
|
|
</head>
|
||
|
|
<body>
|
||
|
|
<div class="node">
|
||
|
|
<p>
|
||
|
|
<a name="Xtensa-Automatic-Alignment"></a>Previous: <a rel="previous" accesskey="p" href="Density-Instructions.html#Density-Instructions">Density Instructions</a>,
|
||
|
|
Up: <a rel="up" accesskey="u" href="Xtensa-Optimizations.html#Xtensa-Optimizations">Xtensa Optimizations</a>
|
||
|
|
<hr><br>
|
||
|
|
</div>
|
||
|
|
|
||
|
|
<h5 class="subsubsection">9.36.3.2 Automatic Instruction Alignment</h5>
|
||
|
|
|
||
|
|
<p><a name="index-alignment-of-_0040code_007bLOOP_007d-instructions-1859"></a><a name="index-alignment-of-branch-targets-1860"></a><a name="index-_0040code_007bLOOP_007d-instructions_002c-alignment-1861"></a><a name="index-branch-target-alignment-1862"></a>
|
||
|
|
The Xtensa assembler will automatically align certain instructions, both
|
||
|
|
to optimize performance and to satisfy architectural requirements.
|
||
|
|
|
||
|
|
<p>As an optimization to improve performance, the assembler attempts to
|
||
|
|
align branch targets so they do not cross instruction fetch boundaries.
|
||
|
|
(Xtensa processors can be configured with either 32-bit or 64-bit
|
||
|
|
instruction fetch widths.) An
|
||
|
|
instruction immediately following a call is treated as a branch target
|
||
|
|
in this context, because it will be the target of a return from the
|
||
|
|
call. This alignment has the potential to reduce branch penalties at
|
||
|
|
some expense in code size.
|
||
|
|
This optimization is enabled by default. You can disable it with the
|
||
|
|
<span class="samp">--no-target-align</span> command-line option (see <a href="Xtensa-Options.html#Xtensa-Options">Command Line Options</a>).
|
||
|
|
|
||
|
|
<p>The target alignment optimization is done without adding instructions
|
||
|
|
that could increase the execution time of the program. If there are
|
||
|
|
density instructions in the code preceding a target, the assembler can
|
||
|
|
change the target alignment by widening some of those instructions to
|
||
|
|
the equivalent 24-bit instructions. Extra bytes of padding can be
|
||
|
|
inserted immediately following unconditional jump and return
|
||
|
|
instructions.
|
||
|
|
This approach is usually successful in aligning many, but not all,
|
||
|
|
branch targets.
|
||
|
|
|
||
|
|
<p>The <code>LOOP</code> family of instructions must be aligned such that the
|
||
|
|
first instruction in the loop body does not cross an instruction fetch
|
||
|
|
boundary (e.g., with a 32-bit fetch width, a <code>LOOP</code> instruction
|
||
|
|
must be on either a 1 or 2 mod 4 byte boundary). The assembler knows
|
||
|
|
about this restriction and inserts the minimal number of 2 or 3 byte
|
||
|
|
no-op instructions to satisfy it. When no-op instructions are added,
|
||
|
|
any label immediately preceding the original loop will be moved in order
|
||
|
|
to refer to the loop instruction, not the newly generated no-op
|
||
|
|
instruction. To preserve binary compatibility across processors with
|
||
|
|
different fetch widths, the assembler conservatively assumes a 32-bit
|
||
|
|
fetch width when aligning <code>LOOP</code> instructions (except if the first
|
||
|
|
instruction in the loop is a 64-bit instruction).
|
||
|
|
|
||
|
|
<p>Previous versions of the assembler automatically aligned <code>ENTRY</code>
|
||
|
|
instructions to 4-byte boundaries, but that alignment is now the
|
||
|
|
programmer's responsibility.
|
||
|
|
|
||
|
|
</body></html>
|
||
|
|
|