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252 lines
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252 lines
14 KiB
HTML
15 years ago
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<title>ARM Directives - Using as</title>
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<meta name="description" content="Using as">
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<link title="Top" rel="start" href="index.html#Top">
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<link rel="up" href="ARM_002dDependent.html#ARM_002dDependent" title="ARM-Dependent">
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<link rel="prev" href="ARM-Floating-Point.html#ARM-Floating-Point" title="ARM Floating Point">
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<link rel="next" href="ARM-Opcodes.html#ARM-Opcodes" title="ARM Opcodes">
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<link href="http://www.gnu.org/software/texinfo/" rel="generator-home" title="Texinfo Homepage">
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<!--
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This file documents the GNU Assembler "as".
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Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002,
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2006, 2007 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 1.1
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or any later version published by the Free Software Foundation;
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with no Invariant Sections, with no Front-Cover Texts, and with no
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Back-Cover Texts. A copy of the license is included in the
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section entitled ``GNU Free Documentation License''.
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</head>
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<body>
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<div class="node">
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<p>
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<a name="ARM-Directives"></a>Next: <a rel="next" accesskey="n" href="ARM-Opcodes.html#ARM-Opcodes">ARM Opcodes</a>,
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Previous: <a rel="previous" accesskey="p" href="ARM-Floating-Point.html#ARM-Floating-Point">ARM Floating Point</a>,
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Up: <a rel="up" accesskey="u" href="ARM_002dDependent.html#ARM_002dDependent">ARM-Dependent</a>
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<hr><br>
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</div>
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<h4 class="subsection">9.3.4 ARM Machine Directives</h4>
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<p><a name="index-machine-directives_002c-ARM-600"></a><a name="index-ARM-machine-directives-601"></a>
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<a name="index-_0040code_007balign_007d-directive_002c-ARM-602"></a>
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<dl><dt><code>.align </code><var>expression</var><code> [, </code><var>expression</var><code>]</code><dd>This is the generic <var>.align</var> directive. For the ARM however if the
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first argument is zero (ie no alignment is needed) the assembler will
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behave as if the argument had been 2 (ie pad to the next four byte
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boundary). This is for compatibility with ARM's own assembler.
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<p><a name="index-_0040code_007breq_007d-directive_002c-ARM-603"></a><br><dt><var>name</var><code> .req </code><var>register name</var><dd>This creates an alias for <var>register name</var> called <var>name</var>. For
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example:
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<pre class="smallexample"> foo .req r0
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</pre>
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<p><a name="index-_0040code_007bunreq_007d-directive_002c-ARM-604"></a><br><dt><code>.unreq </code><var>alias-name</var><dd>This undefines a register alias which was previously defined using the
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<code>req</code>, <code>dn</code> or <code>qn</code> directives. For example:
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<pre class="smallexample"> foo .req r0
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.unreq foo
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</pre>
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<p>An error occurs if the name is undefined. Note - this pseudo op can
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be used to delete builtin in register name aliases (eg 'r0'). This
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should only be done if it is really necessary.
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<p><a name="index-_0040code_007bdn_007d-and-_0040code_007bqn_007d-directives_002c-ARM-605"></a><br><dt><var>name</var><code> .dn </code><var>register name</var><code> [</code><var>.type</var><code>] [[</code><var>index</var><code>]]</code><br><dt><var>name</var><code> .qn </code><var>register name</var><code> [</code><var>.type</var><code>] [[</code><var>index</var><code>]]</code><dd>
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The <code>dn</code> and <code>qn</code> directives are used to create typed
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and/or indexed register aliases for use in Advanced SIMD Extension
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(Neon) instructions. The former should be used to create aliases
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of double-precision registers, and the latter to create aliases of
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quad-precision registers.
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<p>If these directives are used to create typed aliases, those aliases can
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be used in Neon instructions instead of writing types after the mnemonic
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or after each operand. For example:
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<pre class="smallexample"> x .dn d2.f32
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y .dn d3.f32
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z .dn d4.f32[1]
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vmul x,y,z
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</pre>
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<p>This is equivalent to writing the following:
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<pre class="smallexample"> vmul.f32 d2,d3,d4[1]
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</pre>
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<p>Aliases created using <code>dn</code> or <code>qn</code> can be destroyed using
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<code>unreq</code>.
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<p><a name="index-_0040code_007bcode_007d-directive_002c-ARM-606"></a><br><dt><code>.code [16|32]</code><dd>This directive selects the instruction set being generated. The value 16
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selects Thumb, with the value 32 selecting ARM.
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<p><a name="index-_0040code_007bthumb_007d-directive_002c-ARM-607"></a><br><dt><code>.thumb</code><dd>This performs the same action as <var>.code 16</var>.
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<p><a name="index-_0040code_007barm_007d-directive_002c-ARM-608"></a><br><dt><code>.arm</code><dd>This performs the same action as <var>.code 32</var>.
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<p><a name="index-_0040code_007bforce_005fthumb_007d-directive_002c-ARM-609"></a><br><dt><code>.force_thumb</code><dd>This directive forces the selection of Thumb instructions, even if the
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target processor does not support those instructions
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<p><a name="index-_0040code_007bthumb_005ffunc_007d-directive_002c-ARM-610"></a><br><dt><code>.thumb_func</code><dd>This directive specifies that the following symbol is the name of a
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Thumb encoded function. This information is necessary in order to allow
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the assembler and linker to generate correct code for interworking
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between Arm and Thumb instructions and should be used even if
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interworking is not going to be performed. The presence of this
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directive also implies <code>.thumb</code>
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<p>This directive is not neccessary when generating EABI objects. On these
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targets the encoding is implicit when generating Thumb code.
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<p><a name="index-_0040code_007bthumb_005fset_007d-directive_002c-ARM-611"></a><br><dt><code>.thumb_set</code><dd>This performs the equivalent of a <code>.set</code> directive in that it
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creates a symbol which is an alias for another symbol (possibly not yet
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defined). This directive also has the added property in that it marks
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the aliased symbol as being a thumb function entry point, in the same
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way that the <code>.thumb_func</code> directive does.
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<p><a name="index-_0040code_007b_002eltorg_007d-directive_002c-ARM-612"></a><br><dt><code>.ltorg</code><dd>This directive causes the current contents of the literal pool to be
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dumped into the current section (which is assumed to be the .text
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section) at the current location (aligned to a word boundary).
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<code>GAS</code> maintains a separate literal pool for each section and each
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sub-section. The <code>.ltorg</code> directive will only affect the literal
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pool of the current section and sub-section. At the end of assembly
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all remaining, un-empty literal pools will automatically be dumped.
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<p>Note - older versions of <code>GAS</code> would dump the current literal
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pool any time a section change occurred. This is no longer done, since
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it prevents accurate control of the placement of literal pools.
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<p><a name="index-_0040code_007b_002epool_007d-directive_002c-ARM-613"></a><br><dt><code>.pool</code><dd>This is a synonym for .ltorg.
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<p><a name="arm_005ffnstart"></a>
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<a name="index-_0040code_007b_002efnstart_007d-directive_002c-ARM-614"></a><br><dt><code>.fnstart</code><dd>Marks the start of a function with an unwind table entry.
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<p><a name="arm_005ffnend"></a>
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<a name="index-_0040code_007b_002efnend_007d-directive_002c-ARM-615"></a><br><dt><code>.fnend</code><dd>Marks the end of a function with an unwind table entry. The unwind index
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table entry is created when this directive is processed.
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<p>If no personality routine has been specified then standard personality
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routine 0 or 1 will be used, depending on the number of unwind opcodes
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required.
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<p><a name="index-_0040code_007b_002ecantunwind_007d-directive_002c-ARM-616"></a><br><dt><code>.cantunwind</code><dd>Prevents unwinding through the current function. No personality routine
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or exception table data is required or permitted.
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<p><a name="index-_0040code_007b_002epersonality_007d-directive_002c-ARM-617"></a><br><dt><code>.personality </code><var>name</var><dd>Sets the personality routine for the current function to <var>name</var>.
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<p><a name="index-_0040code_007b_002epersonalityindex_007d-directive_002c-ARM-618"></a><br><dt><code>.personalityindex </code><var>index</var><dd>Sets the personality routine for the current function to the EABI standard
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routine number <var>index</var>
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<p><a name="index-_0040code_007b_002ehandlerdata_007d-directive_002c-ARM-619"></a><br><dt><code>.handlerdata</code><dd>Marks the end of the current function, and the start of the exception table
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entry for that function. Anything between this directive and the
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<code>.fnend</code> directive will be added to the exception table entry.
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<p>Must be preceded by a <code>.personality</code> or <code>.personalityindex</code>
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directive.
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<p><a name="arm_005fsave"></a>
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<a name="index-_0040code_007b_002esave_007d-directive_002c-ARM-620"></a><br><dt><code>.save </code><var>reglist</var><dd>Generate unwinder annotations to restore the registers in <var>reglist</var>.
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The format of <var>reglist</var> is the same as the corresponding store-multiple
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instruction.
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<pre class="smallexample"> <br><em>core registers</em><br>
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.save {r4, r5, r6, lr}
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stmfd sp!, {r4, r5, r6, lr}
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<br><em>FPA registers</em><br>
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.save f4, 2
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sfmfd f4, 2, [sp]!
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<br><em>VFP registers</em><br>
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.save {d8, d9, d10}
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fstmdx sp!, {d8, d9, d10}
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<br><em>iWMMXt registers</em><br>
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.save {wr10, wr11}
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wstrd wr11, [sp, #-8]!
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wstrd wr10, [sp, #-8]!
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or
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.save wr11
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wstrd wr11, [sp, #-8]!
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.save wr10
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wstrd wr10, [sp, #-8]!
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</pre>
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<p><a name="index-_0040code_007b_002evsave_007d-directive_002c-ARM-621"></a><br><dt><code>.vsave </code><var>vfp-reglist</var><dd>Generate unwinder annotations to restore the VFP registers in <var>vfp-reglist</var>
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using FLDMD. Also works for VFPv3 registers
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that are to be restored using VLDM.
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The format of <var>vfp-reglist</var> is the same as the corresponding store-multiple
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instruction.
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<pre class="smallexample"> <br><em>VFP registers</em><br>
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.vsave {d8, d9, d10}
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fstmdd sp!, {d8, d9, d10}
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<br><em>VFPv3 registers</em><br>
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.vsave {d15, d16, d17}
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vstm sp!, {d15, d16, d17}
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</pre>
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<p>Since FLDMX and FSTMX are now deprecated, this directive should be
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used in favour of <code>.save</code> for saving VFP registers for ARMv6 and above.
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<p><a name="arm_005fpad"></a>
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<a name="index-_0040code_007b_002epad_007d-directive_002c-ARM-622"></a><br><dt><code>.pad #</code><var>count</var><dd>Generate unwinder annotations for a stack adjustment of <var>count</var> bytes.
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A positive value indicates the function prologue allocated stack space by
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decrementing the stack pointer.
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<p><a name="arm_005fmovsp"></a>
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<a name="index-_0040code_007b_002emovsp_007d-directive_002c-ARM-623"></a><br><dt><code>.movsp </code><var>reg</var><code> [, #</code><var>offset</var><code>]</code><dd>Tell the unwinder that <var>reg</var> contains an offset from the current
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stack pointer. If <var>offset</var> is not specified then it is assumed to be
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zero.
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<p><a name="arm_005fsetfp"></a>
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<a name="index-_0040code_007b_002esetfp_007d-directive_002c-ARM-624"></a><br><dt><code>.setfp </code><var>fpreg</var><code>, </code><var>spreg</var><code> [, #</code><var>offset</var><code>]</code><dd>Make all unwinder annotations relaive to a frame pointer. Without this
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the unwinder will use offsets from the stack pointer.
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<p>The syntax of this directive is the same as the <code>sub</code> or <code>mov</code>
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instruction used to set the frame pointer. <var>spreg</var> must be either
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<code>sp</code> or mentioned in a previous <code>.movsp</code> directive.
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<pre class="smallexample"> .movsp ip
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mov ip, sp
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...
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.setfp fp, ip, #4
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sub fp, ip, #4
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</pre>
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<p><a name="index-_0040code_007b_002eunwind_005fraw_007d-directive_002c-ARM-625"></a><br><dt><code>.raw </code><var>offset</var><code>, </code><var>byte1</var><code>, ...</code><dd>Insert one of more arbitary unwind opcode bytes, which are known to adjust
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the stack pointer by <var>offset</var> bytes.
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<p>For example <code>.unwind_raw 4, 0xb1, 0x01</code> is equivalent to
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<code>.save {r0}</code>
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<p><a name="index-_0040code_007b_002ecpu_007d-directive_002c-ARM-626"></a><br><dt><code>.cpu </code><var>name</var><dd>Select the target processor. Valid values for <var>name</var> are the same as
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for the <span class="option">-mcpu</span> commandline option.
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<p><a name="index-_0040code_007b_002earch_007d-directive_002c-ARM-627"></a><br><dt><code>.arch </code><var>name</var><dd>Select the target architecture. Valid values for <var>name</var> are the same as
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for the <span class="option">-march</span> commandline option.
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<p><a name="index-_0040code_007b_002eobject_005farch_007d-directive_002c-ARM-628"></a><br><dt><code>.object_arch </code><var>name</var><dd>Override the architecture recorded in the EABI object attribute section.
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Valid values for <var>name</var> are the same as for the <code>.arch</code> directive.
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Typically this is useful when code uses runtime detection of CPU features.
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<p><a name="index-_0040code_007b_002efpu_007d-directive_002c-ARM-629"></a><br><dt><code>.fpu </code><var>name</var><dd>Select the floating point unit to assemble for. Valid values for <var>name</var>
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are the same as for the <span class="option">-mfpu</span> commandline option.
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<p><a name="index-_0040code_007b_002eeabi_005fattribute_007d-directive_002c-ARM-630"></a><br><dt><code>.eabi_attribute </code><var>tag</var><code>, </code><var>value</var><dd>Set the EABI object attribute number <var>tag</var> to <var>value</var>. The value
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is either a <code>number</code>, <code>"string"</code>, or <code>number, "string"</code>
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depending on the tag.
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</dl>
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</body></html>
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