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			122 lines
		
	
	
	
		
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								<title>M68HC11-Opts - Using as</title>
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								<link rel="up" href="M68HC11_002dDependent.html#M68HC11_002dDependent" title="M68HC11-Dependent">
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								<!--
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								This file documents the GNU Assembler "as".
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								Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002,
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								2006, 2007 Free Software Foundation, Inc.
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								Permission is granted to copy, distribute and/or modify this document
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								under the terms of the GNU Free Documentation License, Version 1.1
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								or any later version published by the Free Software Foundation;
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								with no Invariant Sections, with no Front-Cover Texts, and with no
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								Back-Cover Texts.  A copy of the license is included in the
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								section entitled ``GNU Free Documentation License''.
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								<p>
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								<a name="M68HC11_002dOpts"></a>Next: <a rel="next" accesskey="n" href="M68HC11_002dSyntax.html#M68HC11_002dSyntax">M68HC11-Syntax</a>,
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								Up: <a rel="up" accesskey="u" href="M68HC11_002dDependent.html#M68HC11_002dDependent">M68HC11-Dependent</a>
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								<hr><br>
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								</div>
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								<h4 class="subsection">9.21.1 M68HC11 and M68HC12 Options</h4>
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								<p><a name="index-options_002c-M68HC11-1144"></a><a name="index-M68HC11-options-1145"></a>The Motorola 68HC11 and 68HC12 version of <code>as</code> have a few machine
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								dependent options.
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								<a name="index-_0040samp_007b_002dm68hc11_007d-1146"></a>
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								<dl><dt><code>-m68hc11</code><dd>This option switches the assembler in the M68HC11 mode. In this mode,
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								the assembler only accepts 68HC11 operands and mnemonics. It produces
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								code for the 68HC11.
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								     <p><a name="index-_0040samp_007b_002dm68hc12_007d-1147"></a><br><dt><code>-m68hc12</code><dd>This option switches the assembler in the M68HC12 mode. In this mode,
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								the assembler also accepts 68HC12 operands and mnemonics. It produces
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								code for the 68HC12. A few 68HC11 instructions are replaced by
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								some 68HC12 instructions as recommended by Motorola specifications.
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								     <p><a name="index-_0040samp_007b_002dm68hcs12_007d-1148"></a><br><dt><code>-m68hcs12</code><dd>This option switches the assembler in the M68HCS12 mode.  This mode is
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								similar to <span class="samp">-m68hc12</span> but specifies to assemble for the 68HCS12
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								series.  The only difference is on the assembling of the <span class="samp">movb</span>
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								and <span class="samp">movw</span> instruction when a PC-relative operand is used.
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								     <p><a name="index-_0040samp_007b_002dmshort_007d-1149"></a><br><dt><code>-mshort</code><dd>This option controls the ABI and indicates to use a 16-bit integer ABI. 
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								It has no effect on the assembled instructions. 
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								This is the default.
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								     <p><a name="index-_0040samp_007b_002dmlong_007d-1150"></a><br><dt><code>-mlong</code><dd>This option controls the ABI and indicates to use a 32-bit integer ABI.
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								     <p><a name="index-_0040samp_007b_002dmshort_002ddouble_007d-1151"></a><br><dt><code>-mshort-double</code><dd>This option controls the ABI and indicates to use a 32-bit float ABI. 
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								This is the default.
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								     <p><a name="index-_0040samp_007b_002dmlong_002ddouble_007d-1152"></a><br><dt><code>-mlong-double</code><dd>This option controls the ABI and indicates to use a 64-bit float ABI.
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								     <p><a name="index-_0040samp_007b_002d_002dstrict_002ddirect_002dmode_007d-1153"></a><br><dt><code>--strict-direct-mode</code><dd>You can use the <span class="samp">--strict-direct-mode</span> option to disable
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								the automatic translation of direct page mode addressing into
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								extended mode when the instruction does not support direct mode. 
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								For example, the <span class="samp">clr</span> instruction does not support direct page
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								mode addressing. When it is used with the direct page mode,
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								<code>as</code> will ignore it and generate an absolute addressing. 
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								This option prevents <code>as</code> from doing this, and the wrong
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								usage of the direct page mode will raise an error.
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								     <p><a name="index-_0040samp_007b_002d_002dshort_002dbranches_007d-1154"></a><br><dt><code>--short-branches</code><dd>The <span class="samp">--short-branches</span> option turns off the translation of
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								relative branches into absolute branches when the branch offset is
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								out of range. By default <code>as</code> transforms the relative
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								branch (<span class="samp">bsr</span>, <span class="samp">bgt</span>, <span class="samp">bge</span>, <span class="samp">beq</span>, <span class="samp">bne</span>,
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								<span class="samp">ble</span>, <span class="samp">blt</span>, <span class="samp">bhi</span>, <span class="samp">bcc</span>, <span class="samp">bls</span>,
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								<span class="samp">bcs</span>, <span class="samp">bmi</span>, <span class="samp">bvs</span>, <span class="samp">bvs</span>, <span class="samp">bra</span>) into
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								an absolute branch when the offset is out of the -128 .. 127 range. 
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								In that case, the <span class="samp">bsr</span> instruction is translated into a
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								<span class="samp">jsr</span>, the <span class="samp">bra</span> instruction is translated into a
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								<span class="samp">jmp</span> and the conditional branches instructions are inverted and
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								followed by a <span class="samp">jmp</span>. This option disables these translations
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								and <code>as</code> will generate an error if a relative branch
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								is out of range. This option does not affect the optimization
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								associated to the <span class="samp">jbra</span>, <span class="samp">jbsr</span> and <span class="samp">jbXX</span> pseudo opcodes.
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								     <p><a name="index-_0040samp_007b_002d_002dforce_002dlong_002dbranches_007d-1155"></a><br><dt><code>--force-long-branches</code><dd>The <span class="samp">--force-long-branches</span> option forces the translation of
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								relative branches into absolute branches. This option does not affect
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								the optimization associated to the <span class="samp">jbra</span>, <span class="samp">jbsr</span> and
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								<span class="samp">jbXX</span> pseudo opcodes.
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								     <p><a name="index-_0040samp_007b_002d_002dprint_002dinsn_002dsyntax_007d-1156"></a><br><dt><code>--print-insn-syntax</code><dd>You can use the <span class="samp">--print-insn-syntax</span> option to obtain the
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								syntax description of the instruction when an error is detected.
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								     <p><a name="index-_0040samp_007b_002d_002dprint_002dopcodes_007d-1157"></a><br><dt><code>--print-opcodes</code><dd>The <span class="samp">--print-opcodes</span> option prints the list of all the
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								instructions with their syntax. The first item of each line
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								represents the instruction name and the rest of the line indicates
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								the possible operands for that instruction. The list is printed
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								in alphabetical order. Once the list is printed <code>as</code>
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								exits.
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								     <p><a name="index-_0040samp_007b_002d_002dgenerate_002dexample_007d-1158"></a><br><dt><code>--generate-example</code><dd>The <span class="samp">--generate-example</span> option is similar to <span class="samp">--print-opcodes</span>
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								but it generates an example for each instruction instead. 
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								</dl>
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