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								This file documents the GNU Assembler "as".
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								Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002,
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								<a name="M68HC11_002dSyntax"></a>Next: <a rel="next" accesskey="n" href="M68HC11_002dModifiers.html#M68HC11_002dModifiers">M68HC11-Modifiers</a>,
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								Previous: <a rel="previous" accesskey="p" href="M68HC11_002dOpts.html#M68HC11_002dOpts">M68HC11-Opts</a>,
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								Up: <a rel="up" accesskey="u" href="M68HC11_002dDependent.html#M68HC11_002dDependent">M68HC11-Dependent</a>
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								</div>
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								<h4 class="subsection">9.21.2 Syntax</h4>
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								<p><a name="index-M68HC11-syntax-1159"></a><a name="index-syntax_002c-M68HC11-1160"></a>
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								In the M68HC11 syntax, the instruction name comes first and it may
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								be followed by one or several operands (up to three). Operands are
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								separated by comma (<span class="samp">,</span>). In the normal mode,
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								<code>as</code> will complain if too many operands are specified for
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								a given instruction. In the MRI mode (turned on with <span class="samp">-M</span> option),
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								it will treat them as comments. Example:
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								<pre class="smallexample">     inx
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								     lda  #23
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								     bset 2,x #4
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								     brclr *bot #8 foo
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								</pre>
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								   <p><a name="index-M68HC11-addressing-modes-1161"></a><a name="index-addressing-modes_002c-M68HC11-1162"></a>The following addressing modes are understood for 68HC11 and 68HC12:
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								     <dl>
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								<dt><dfn>Immediate</dfn><dd><span class="samp">#</span><var>number</var>
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								     <br><dt><dfn>Address Register</dfn><dd><var>number</var><span class="samp">,X</span>, <var>number</var><span class="samp">,Y</span>
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								     <p>The <var>number</var> may be omitted in which case 0 is assumed.
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								     <br><dt><dfn>Direct Addressing mode</dfn><dd><span class="samp">*</span><var>symbol</var>, or <span class="samp">*</span><var>digits</var>
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								     <br><dt><dfn>Absolute</dfn><dd><var>symbol</var>, or <var>digits</var>
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								</dl>
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								   <p>The M68HC12 has other more complex addressing modes. All of them
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								are supported and they are represented below:
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								     <dl>
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								<dt><dfn>Constant Offset Indexed Addressing Mode</dfn><dd><var>number</var><span class="samp">,</span><var>reg</var>
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								     <p>The <var>number</var> may be omitted in which case 0 is assumed. 
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								The register can be either <span class="samp">X</span>, <span class="samp">Y</span>, <span class="samp">SP</span> or
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								<span class="samp">PC</span>.  The assembler will use the smaller post-byte definition
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								according to the constant value (5-bit constant offset, 9-bit constant
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								offset or 16-bit constant offset).  If the constant is not known by
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								the assembler it will use the 16-bit constant offset post-byte and the value
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								will be resolved at link time.
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								     <br><dt><dfn>Offset Indexed Indirect</dfn><dd><span class="samp">[</span><var>number</var><span class="samp">,</span><var>reg</var><span class="samp">]</span>
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								     <p>The register can be either <span class="samp">X</span>, <span class="samp">Y</span>, <span class="samp">SP</span> or <span class="samp">PC</span>.
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								     <br><dt><dfn>Auto Pre-Increment/Pre-Decrement/Post-Increment/Post-Decrement</dfn><dd><var>number</var><span class="samp">,-</span><var>reg</var>
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								<var>number</var><span class="samp">,+</span><var>reg</var>
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								<var>number</var><span class="samp">,</span><var>reg</var><span class="samp">-</span>
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								<var>number</var><span class="samp">,</span><var>reg</var><span class="samp">+</span>
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								     <p>The number must be in the range <span class="samp">-8</span>..<span class="samp">+8</span> and must not be 0. 
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								The register can be either <span class="samp">X</span>, <span class="samp">Y</span>, <span class="samp">SP</span> or <span class="samp">PC</span>.
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								     <br><dt><dfn>Accumulator Offset</dfn><dd><var>acc</var><span class="samp">,</span><var>reg</var>
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								     <p>The accumulator register can be either <span class="samp">A</span>, <span class="samp">B</span> or <span class="samp">D</span>. 
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								The register can be either <span class="samp">X</span>, <span class="samp">Y</span>, <span class="samp">SP</span> or <span class="samp">PC</span>.
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								     <br><dt><dfn>Accumulator D offset indexed-indirect</dfn><dd><span class="samp">[D,</span><var>reg</var><span class="samp">]</span>
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								     <p>The register can be either <span class="samp">X</span>, <span class="samp">Y</span>, <span class="samp">SP</span> or <span class="samp">PC</span>.
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								   </dl>
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								   <p>For example:
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								<pre class="smallexample">     ldab 1024,sp
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								     ldd [10,x]
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								     orab 3,+x
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								     stab -2,y-
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								     ldx a,pc
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								     sty [d,sp]
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								</pre>
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