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113 lines
6.4 KiB
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113 lines
6.4 KiB
HTML
15 years ago
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<title>i386-Regs - Using as</title>
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<meta name="description" content="Using as">
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<meta name="generator" content="makeinfo 4.7">
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<link title="Top" rel="start" href="index.html#Top">
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<link rel="up" href="i386_002dDependent.html#i386_002dDependent" title="i386-Dependent">
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<link rel="prev" href="i386_002dMnemonics.html#i386_002dMnemonics" title="i386-Mnemonics">
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<link rel="next" href="i386_002dPrefixes.html#i386_002dPrefixes" title="i386-Prefixes">
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<link href="http://www.gnu.org/software/texinfo/" rel="generator-home" title="Texinfo Homepage">
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<!--
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This file documents the GNU Assembler "as".
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Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002,
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2006, 2007 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 1.1
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or any later version published by the Free Software Foundation;
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with no Invariant Sections, with no Front-Cover Texts, and with no
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Back-Cover Texts. A copy of the license is included in the
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section entitled ``GNU Free Documentation License''.
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man end-->
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--></style>
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</head>
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<body>
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<div class="node">
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<p>
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<a name="i386_002dRegs"></a>Next: <a rel="next" accesskey="n" href="i386_002dPrefixes.html#i386_002dPrefixes">i386-Prefixes</a>,
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Previous: <a rel="previous" accesskey="p" href="i386_002dMnemonics.html#i386_002dMnemonics">i386-Mnemonics</a>,
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Up: <a rel="up" accesskey="u" href="i386_002dDependent.html#i386_002dDependent">i386-Dependent</a>
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<hr><br>
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</div>
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<h4 class="subsection">9.13.6 Register Naming</h4>
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<p><a name="index-i386-registers-901"></a><a name="index-registers_002c-i386-902"></a><a name="index-x86_002d64-registers-903"></a><a name="index-registers_002c-x86_002d64-904"></a>Register operands are always prefixed with <span class="samp">%</span>. The 80386 registers
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consist of
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<ul>
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<li>the 8 32-bit registers <span class="samp">%eax</span> (the accumulator), <span class="samp">%ebx</span>,
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<span class="samp">%ecx</span>, <span class="samp">%edx</span>, <span class="samp">%edi</span>, <span class="samp">%esi</span>, <span class="samp">%ebp</span> (the
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frame pointer), and <span class="samp">%esp</span> (the stack pointer).
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<li>the 8 16-bit low-ends of these: <span class="samp">%ax</span>, <span class="samp">%bx</span>, <span class="samp">%cx</span>,
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<span class="samp">%dx</span>, <span class="samp">%di</span>, <span class="samp">%si</span>, <span class="samp">%bp</span>, and <span class="samp">%sp</span>.
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<li>the 8 8-bit registers: <span class="samp">%ah</span>, <span class="samp">%al</span>, <span class="samp">%bh</span>,
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<span class="samp">%bl</span>, <span class="samp">%ch</span>, <span class="samp">%cl</span>, <span class="samp">%dh</span>, and <span class="samp">%dl</span> (These
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are the high-bytes and low-bytes of <span class="samp">%ax</span>, <span class="samp">%bx</span>,
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<span class="samp">%cx</span>, and <span class="samp">%dx</span>)
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<li>the 6 section registers <span class="samp">%cs</span> (code section), <span class="samp">%ds</span>
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(data section), <span class="samp">%ss</span> (stack section), <span class="samp">%es</span>, <span class="samp">%fs</span>,
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and <span class="samp">%gs</span>.
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<li>the 3 processor control registers <span class="samp">%cr0</span>, <span class="samp">%cr2</span>, and
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<span class="samp">%cr3</span>.
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<li>the 6 debug registers <span class="samp">%db0</span>, <span class="samp">%db1</span>, <span class="samp">%db2</span>,
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<span class="samp">%db3</span>, <span class="samp">%db6</span>, and <span class="samp">%db7</span>.
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<li>the 2 test registers <span class="samp">%tr6</span> and <span class="samp">%tr7</span>.
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<li>the 8 floating point register stack <span class="samp">%st</span> or equivalently
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<span class="samp">%st(0)</span>, <span class="samp">%st(1)</span>, <span class="samp">%st(2)</span>, <span class="samp">%st(3)</span>,
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<span class="samp">%st(4)</span>, <span class="samp">%st(5)</span>, <span class="samp">%st(6)</span>, and <span class="samp">%st(7)</span>.
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These registers are overloaded by 8 MMX registers <span class="samp">%mm0</span>,
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<span class="samp">%mm1</span>, <span class="samp">%mm2</span>, <span class="samp">%mm3</span>, <span class="samp">%mm4</span>, <span class="samp">%mm5</span>,
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<span class="samp">%mm6</span> and <span class="samp">%mm7</span>.
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<li>the 8 SSE registers registers <span class="samp">%xmm0</span>, <span class="samp">%xmm1</span>, <span class="samp">%xmm2</span>,
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<span class="samp">%xmm3</span>, <span class="samp">%xmm4</span>, <span class="samp">%xmm5</span>, <span class="samp">%xmm6</span> and <span class="samp">%xmm7</span>.
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</ul>
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<p>The AMD x86-64 architecture extends the register set by:
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<ul>
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<li>enhancing the 8 32-bit registers to 64-bit: <span class="samp">%rax</span> (the
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accumulator), <span class="samp">%rbx</span>, <span class="samp">%rcx</span>, <span class="samp">%rdx</span>, <span class="samp">%rdi</span>,
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<span class="samp">%rsi</span>, <span class="samp">%rbp</span> (the frame pointer), <span class="samp">%rsp</span> (the stack
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pointer)
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<li>the 8 extended registers <span class="samp">%r8</span>–<span class="samp">%r15</span>.
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<li>the 8 32-bit low ends of the extended registers: <span class="samp">%r8d</span>–<span class="samp">%r15d</span>
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<li>the 8 16-bit low ends of the extended registers: <span class="samp">%r8w</span>–<span class="samp">%r15w</span>
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<li>the 8 8-bit low ends of the extended registers: <span class="samp">%r8b</span>–<span class="samp">%r15b</span>
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<li>the 4 8-bit registers: <span class="samp">%sil</span>, <span class="samp">%dil</span>, <span class="samp">%bpl</span>, <span class="samp">%spl</span>.
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<li>the 8 debug registers: <span class="samp">%db8</span>–<span class="samp">%db15</span>.
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<li>the 8 SSE registers: <span class="samp">%xmm8</span>–<span class="samp">%xmm15</span>.
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</ul>
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</body></html>
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