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								<title>ARM Unwinding Tutorial - Using as</title>
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								This file documents the GNU Assembler "as".
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								Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002,
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								<a name="ARM-Unwinding-Tutorial"></a>Previous: <a rel="previous" accesskey="p" href="ARM-Mapping-Symbols.html#ARM-Mapping-Symbols">ARM Mapping Symbols</a>,
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								Up: <a rel="up" accesskey="u" href="ARM_002dDependent.html#ARM_002dDependent">ARM-Dependent</a>
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								<hr><br>
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								</div>
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								<h4 class="subsection">9.3.7 Unwinding</h4>
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								<p>The ABI for the ARM Architecture specifies a standard format for
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								exception unwind information.  This information is used when an
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								exception is thrown to determine where control should be transferred. 
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								In particular, the unwind information is used to determine which
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								function called the function that threw the exception, and which
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								function called that one, and so forth.  This information is also used
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								to restore the values of callee-saved registers in the function
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								catching the exception.
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								   <p>If you are writing functions in assembly code, and those functions
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								call other functions that throw exceptions, you must use assembly
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								pseudo ops to ensure that appropriate exception unwind information is
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								generated.  Otherwise, if one of the functions called by your assembly
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								code throws an exception, the run-time library will be unable to
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								unwind the stack through your assembly code and your program will not
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								behave correctly.
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								   <p>To illustrate the use of these pseudo ops, we will examine the code
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								that G++ generates for the following C++ input:
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								<pre class="verbatim">
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								void callee (int *);
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								int 
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								caller () 
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								{
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								  int i;
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								  callee (&i);
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								  return i; 
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								}
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								</pre>
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								   <p>This example does not show how to throw or catch an exception from
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								assembly code.  That is a much more complex operation and should
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								always be done in a high-level language, such as C++, that directly
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								supports exceptions.
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								   <p>The code generated by one particular version of G++ when compiling the
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								example above is:
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								<pre class="verbatim">
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								_Z6callerv:
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									.fnstart
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								.LFB2:
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									@ Function supports interworking.
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									@ args = 0, pretend = 0, frame = 8
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									@ frame_needed = 1, uses_anonymous_args = 0
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									stmfd	sp!, {fp, lr}
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									.save {fp, lr}
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								.LCFI0:
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									.setfp fp, sp, #4
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									add	fp, sp, #4
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								.LCFI1:
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									.pad #8
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									sub	sp, sp, #8
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								.LCFI2:
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									sub	r3, fp, #8
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									mov	r0, r3
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									bl	_Z6calleePi
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									ldr	r3, [fp, #-8]
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									mov	r0, r3
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									sub	sp, fp, #4
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									ldmfd	sp!, {fp, lr}
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									bx	lr
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								.LFE2:
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									.fnend
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								</pre>
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								   <p>Of course, the sequence of instructions varies based on the options
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								you pass to GCC and on the version of GCC in use.  The exact
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								instructions are not important since we are focusing on the pseudo ops
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								that are used to generate unwind information.
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								   <p>An important assumption made by the unwinder is that the stack frame
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								does not change during the body of the function.  In particular, since
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								we assume that the assembly code does not itself throw an exception,
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								the only point where an exception can be thrown is from a call, such
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								as the <code>bl</code> instruction above.  At each call site, the same saved
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								registers (including <code>lr</code>, which indicates the return address)
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								must be located in the same locations relative to the frame pointer.
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								   <p>The <code>.fnstart</code> (see <a href="arm_005ffnstart.html#arm_005ffnstart">.fnstart pseudo op</a>) pseudo
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								op appears immediately before the first instruction of the function
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								while the <code>.fnend</code> (see <a href="arm_005ffnend.html#arm_005ffnend">.fnend pseudo op</a>) pseudo
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								op appears immediately after the last instruction of the function. 
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								These pseudo ops specify the range of the function.
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								   <p>Only the order of the other pseudos ops (e.g., <code>.setfp</code> or
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								<code>.pad</code>) matters; their exact locations are irrelevant.  In the
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								example above, the compiler emits the pseudo ops with particular
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								instructions.  That makes it easier to understand the code, but it is
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								not required for correctness.  It would work just as well to emit all
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								of the pseudo ops other than <code>.fnend</code> in the same order, but
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								immediately after <code>.fnstart</code>.
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								   <p>The <code>.save</code> (see <a href="arm_005fsave.html#arm_005fsave">.save pseudo op</a>) pseudo op
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								indicates registers that have been saved to the stack so that they can
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								be restored before the function returns.  The argument to the
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								<code>.save</code> pseudo op is a list of registers to save.  If a register
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								is “callee-saved” (as specified by the ABI) and is modified by the
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								function you are writing, then your code must save the value before it
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								is modified and restore the original value before the function
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								returns.  If an exception is thrown, the run-time library restores the
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								values of these registers from their locations on the stack before
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								returning control to the exception handler.  (Of course, if an
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								exception is not thrown, the function that contains the <code>.save</code>
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								pseudo op restores these registers in the function epilogue, as is
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								done with the <code>ldmfd</code> instruction above.)
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								   <p>You do not have to save callee-saved registers at the very beginning
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								of the function and you do not need to use the <code>.save</code> pseudo op
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								immediately following the point at which the registers are saved. 
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								However, if you modify a callee-saved register, you must save it on
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								the stack before modifying it and before calling any functions which
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								might throw an exception.  And, you must use the <code>.save</code> pseudo
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								op to indicate that you have done so.
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								   <p>The <code>.pad</code> (see <a href="arm_005fpad.html#arm_005fpad">.pad</a>) pseudo op indicates a
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								modification of the stack pointer that does not save any registers. 
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								The argument is the number of bytes (in decimal) that are subtracted
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								from the stack pointer.  (On ARM CPUs, the stack grows downwards, so
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								subtracting from the stack pointer increases the size of the stack.)
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								   <p>The <code>.setfp</code> (see <a href="arm_005fsetfp.html#arm_005fsetfp">.setfp pseudo op</a>) pseudo op
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								indicates the register that contains the frame pointer.  The first
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								argument is the register that is set, which is typically <code>fp</code>. 
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								The second argument indicates the register from which the frame
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								pointer takes its value.  The third argument, if present, is the value
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								(in decimal) added to the register specified by the second argument to
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								compute the value of the frame pointer.  You should not modify the
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								frame pointer in the body of the function.
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								   <p>If you do not use a frame pointer, then you should not use the
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								<code>.setfp</code> pseudo op.  If you do not use a frame pointer, then you
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								should avoid modifying the stack pointer outside of the function
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								prologue.  Otherwise, the run-time library will be unable to find
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								saved registers when it is unwinding the stack.
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								   <p>The pseudo ops described above are sufficient for writing assembly
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								code that calls functions which may throw exceptions.  If you need to
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								know more about the object-file format used to represent unwind
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								information, you may consult the <cite>Exception Handling ABI for the
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								ARM Architecture</cite> available from <a href="http://infocenter.arm.com">http://infocenter.arm.com</a>.
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								<!-- Copyright 2006 -->
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								<!-- Free Software Foundation, Inc. -->
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								<!-- This is part of the GAS manual. -->
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