85 lines
3.8 KiB
HTML
85 lines
3.8 KiB
HTML
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<html lang="en">
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<head>
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<title>M68HC11/68HC12 - Untitled</title>
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<meta http-equiv="Content-Type" content="text/html">
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<meta name="description" content="Untitled">
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<meta name="generator" content="makeinfo 4.7">
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<link title="Top" rel="start" href="index.html#Top">
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<link rel="up" href="Machine-Dependent.html#Machine-Dependent" title="Machine Dependent">
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<link rel="prev" href="MSP430.html#MSP430" title="MSP430">
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<link rel="next" href="PowerPC-ELF32.html#PowerPC-ELF32" title="PowerPC ELF32">
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<link href="http://www.gnu.org/software/texinfo/" rel="generator-home" title="Texinfo Homepage">
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<!--
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This file documents the GNU linker LD
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(GNU Binutils)
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version 2.19.
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Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000,
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2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 1.1
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or any later version published by the Free Software Foundation;
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with no Invariant Sections, with no Front-Cover Texts, and with no
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Back-Cover Texts. A copy of the license is included in the
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section entitled ``GNU Free Documentation License''.-->
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<style type="text/css"><!--
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--></style>
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</head>
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<body>
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<div class="node">
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<p>
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<a name="M68HC11_002f68HC12"></a>Next: <a rel="next" accesskey="n" href="PowerPC-ELF32.html#PowerPC-ELF32">PowerPC ELF32</a>,
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Previous: <a rel="previous" accesskey="p" href="MSP430.html#MSP430">MSP430</a>,
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Up: <a rel="up" accesskey="u" href="Machine-Dependent.html#Machine-Dependent">Machine Dependent</a>
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<hr><br>
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</div>
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<h3 class="section">4.3 <span class="command">ld</span> and the Motorola 68HC11 and 68HC12 families</h3>
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<p><a name="index-M68HC11-and-68HC12-support-528"></a>
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<h4 class="subsection">4.3.1 Linker Relaxation</h4>
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<p>For the Motorola 68HC11, <span class="command">ld</span> can perform these global
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optimizations when you specify the <span class="samp">--relax</span> command-line option.
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<a name="index-relaxing-on-M68HC11-529"></a>
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<dl><dt><em>relaxing address modes</em><dd><span class="command">ld</span> finds all <code>jsr</code> and <code>jmp</code> instructions whose
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targets are within eight bits, and turns them into eight-bit
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program-counter relative <code>bsr</code> and <code>bra</code> instructions,
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respectively.
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<p><span class="command">ld</span> also looks at all 16-bit extended addressing modes and
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transforms them in a direct addressing mode when the address is in
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page 0 (between 0 and 0x0ff).
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<br><dt><em>relaxing gcc instruction group</em><dd>When <span class="command">gcc</span> is called with <span class="option">-mrelax</span>, it can emit group
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of instructions that the linker can optimize to use a 68HC11 direct
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addressing mode. These instructions consists of <code>bclr</code> or
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<code>bset</code> instructions.
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</dl>
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<h4 class="subsection">4.3.2 Trampoline Generation</h4>
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<p><a name="index-trampoline-generation-on-M68HC11-530"></a><a name="index-trampoline-generation-on-M68HC12-531"></a>For 68HC11 and 68HC12, <span class="command">ld</span> can generate trampoline code to
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call a far function using a normal <code>jsr</code> instruction. The linker
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will also change the relocation to some far function to use the
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trampoline address instead of the function address. This is typically the
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case when a pointer to a function is taken. The pointer will in fact
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point to the function trampoline.
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</body></html>
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