113 lines
5.6 KiB
HTML
113 lines
5.6 KiB
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<html lang="en">
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<head>
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<title>Xtensa - Untitled</title>
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<meta http-equiv="Content-Type" content="text/html">
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<meta name="description" content="Untitled">
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<meta name="generator" content="makeinfo 4.7">
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<link title="Top" rel="start" href="index.html#Top">
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<link rel="up" href="Machine-Dependent.html#Machine-Dependent" title="Machine Dependent">
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<link rel="prev" href="WIN32.html#WIN32" title="WIN32">
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<link href="http://www.gnu.org/software/texinfo/" rel="generator-home" title="Texinfo Homepage">
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<!--
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This file documents the GNU linker LD
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(GNU Binutils)
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version 2.19.
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Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000,
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2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 1.1
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or any later version published by the Free Software Foundation;
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with no Invariant Sections, with no Front-Cover Texts, and with no
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Back-Cover Texts. A copy of the license is included in the
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section entitled ``GNU Free Documentation License''.-->
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<meta http-equiv="Content-Style-Type" content="text/css">
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<style type="text/css"><!--
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pre.display { font-family:inherit }
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pre.format { font-family:inherit }
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pre.smallformat { font-family:inherit; font-size:smaller }
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span.sc { font-variant:small-caps }
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span.roman { font-family: serif; font-weight: normal; }
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--></style>
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</head>
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<body>
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<div class="node">
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<p>
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<a name="Xtensa"></a>Previous: <a rel="previous" accesskey="p" href="WIN32.html#WIN32">WIN32</a>,
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Up: <a rel="up" accesskey="u" href="Machine-Dependent.html#Machine-Dependent">Machine Dependent</a>
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<hr><br>
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</div>
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<h3 class="section">4.14 <code>ld</code> and Xtensa Processors</h3>
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<p><a name="index-Xtensa-processors-624"></a>The default <span class="command">ld</span> behavior for Xtensa processors is to interpret
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<code>SECTIONS</code> commands so that lists of explicitly named sections in a
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specification with a wildcard file will be interleaved when necessary to
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keep literal pools within the range of PC-relative load offsets. For
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example, with the command:
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<pre class="smallexample"> SECTIONS
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{
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.text : {
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*(.literal .text)
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}
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}
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</pre>
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<p class="noindent"><span class="command">ld</span> may interleave some of the <code>.literal</code>
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and <code>.text</code> sections from different object files to ensure that the
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literal pools are within the range of PC-relative load offsets. A valid
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interleaving might place the <code>.literal</code> sections from an initial
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group of files followed by the <code>.text</code> sections of that group of
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files. Then, the <code>.literal</code> sections from the rest of the files
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and the <code>.text</code> sections from the rest of the files would follow.
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<p><a name="index-_0040option_007b_002d_002drelax_007d-on-Xtensa-625"></a><a name="index-relaxing-on-Xtensa-626"></a>Relaxation is enabled by default for the Xtensa version of <span class="command">ld</span> and
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provides two important link-time optimizations. The first optimization
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is to combine identical literal values to reduce code size. A redundant
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literal will be removed and all the <code>L32R</code> instructions that use it
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will be changed to reference an identical literal, as long as the
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location of the replacement literal is within the offset range of all
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the <code>L32R</code> instructions. The second optimization is to remove
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unnecessary overhead from assembler-generated “longcall” sequences of
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<code>L32R</code>/<code>CALLX</code><var>n</var> when the target functions are within
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range of direct <code>CALL</code><var>n</var> instructions.
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<p>For each of these cases where an indirect call sequence can be optimized
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to a direct call, the linker will change the <code>CALLX</code><var>n</var>
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instruction to a <code>CALL</code><var>n</var> instruction, remove the <code>L32R</code>
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instruction, and remove the literal referenced by the <code>L32R</code>
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instruction if it is not used for anything else. Removing the
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<code>L32R</code> instruction always reduces code size but can potentially
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hurt performance by changing the alignment of subsequent branch targets.
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By default, the linker will always preserve alignments, either by
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switching some instructions between 24-bit encodings and the equivalent
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density instructions or by inserting a no-op in place of the <code>L32R</code>
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instruction that was removed. If code size is more important than
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performance, the <span class="option">--size-opt</span> option can be used to prevent the
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linker from widening density instructions or inserting no-ops, except in
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a few cases where no-ops are required for correctness.
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<p>The following Xtensa-specific command-line options can be used to
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control the linker:
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<p><a name="index-Xtensa-options-627"></a>
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<a name="index-_002d_002dno_002drelax-628"></a>
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<dl><dt><span class="option">--no-relax</span><dd>Since the Xtensa version of <code>ld</code> enables the <span class="option">--relax</span> option
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by default, the <span class="option">--no-relax</span> option is provided to disable
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relaxation.
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<br><dt><span class="option">--size-opt</span><dd>When optimizing indirect calls to direct calls, optimize for code size
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more than performance. With this option, the linker will not insert
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no-ops or widen density instructions to preserve branch target
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alignment. There may still be some cases where no-ops are required to
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preserve the correctness of the code.
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</dl>
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</body></html>
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