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<h4 class="subsection">9.22.5 Directives to override the ISA level</h4>
<p><a name="index-MIPS-ISA-override-1215"></a><a name="index-_0040code_007b_002eset-mips_0040var_007bn_007d_007d-1216"></a><span class="sc">gnu</span> <code>as</code> supports an additional directive to change
the <span class="sc">mips</span> Instruction Set Architecture level on the fly: <code>.set
mips</code><var>n</var>. <var>n</var> should be a number from 0 to 5, or 32, 32r2, 64
or 64r2.
The values other than 0 make the assembler accept instructions
for the corresponding <span class="sc">isa</span> level, from that point on in the
assembly. <code>.set mips</code><var>n</var> affects not only which instructions
are permitted, but also how certain macros are expanded. <code>.set
mips0</code> restores the <span class="sc">isa</span> level to its original level: either the
level you selected with command line options, or the default for your
configuration. You can use this feature to permit specific <span class="sc">mips3</span>
instructions while assembling in 32 bit mode. Use this directive with
care!
<p><a name="index-MIPS-CPU-override-1217"></a><a name="index-_0040code_007b_002eset-arch_003d_0040var_007bcpu_007d_007d-1218"></a>The <code>.set arch=</code><var>cpu</var> directive provides even finer control.
It changes the effective CPU target and allows the assembler to use
instructions specific to a particular CPU. All CPUs supported by the
<span class="samp">-march</span> command line option are also selectable by this directive.
The original value is restored by <code>.set arch=default</code>.
<p>The directive <code>.set mips16</code> puts the assembler into MIPS 16 mode,
in which it will assemble instructions for the MIPS 16 processor. Use
<code>.set nomips16</code> to return to normal 32 bit mode.
<p>Traditional <span class="sc">mips</span> assemblers do not support this directive.
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