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<a name="M68K_002dOpts"></a>Next: <a rel="next" accesskey="n" href="M68K_002dSyntax.html#M68K_002dSyntax">M68K-Syntax</a>,
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<h4 class="subsection">9.20.1 M680x0 Options</h4>
<p><a name="index-options_002c-M680x0-1085"></a><a name="index-M680x0-options-1086"></a>The Motorola 680x0 version of <code>as</code> has a few machine
dependent options:
<a name="index-_0040samp_007b_002dmarch_003d_007d-command-line-option_002c-M680x0-1087"></a>
<dl><dt><span class="samp">-march=</span><var>architecture</var><dd>This option specifies a target architecture. The following
architectures are recognized:
<code>68000</code>,
<code>68010</code>,
<code>68020</code>,
<code>68030</code>,
<code>68040</code>,
<code>68060</code>,
<code>cpu32</code>,
<code>isaa</code>,
<code>isaaplus</code>,
<code>isab</code>,
<code>isac</code> and
<code>cfv4e</code>.
<p><a name="index-_0040samp_007b_002dmcpu_003d_007d-command-line-option_002c-M680x0-1088"></a><br><dt><span class="samp">-mcpu=</span><var>cpu</var><dd>This option specifies a target cpu. When used in conjunction with the
<span class="option">-march</span> option, the cpu must be within the specified
architecture. Also, the generic features of the architecture are used
for instruction generation, rather than those of the specific chip.
<p><a name="index-_0040samp_007b_002dm_005bno_002d_005d68851_007d-command-line-option_002c-M680x0-1089"></a><a name="index-_0040samp_007b_002dm_005bno_002d_005d68881_007d-command-line-option_002c-M680x0-1090"></a><a name="index-_0040samp_007b_002dm_005bno_002d_005ddiv_007d-command-line-option_002c-M680x0-1091"></a><a name="index-_0040samp_007b_002dm_005bno_002d_005dusp_007d-command-line-option_002c-M680x0-1092"></a><a name="index-_0040samp_007b_002dm_005bno_002d_005dfloat_007d-command-line-option_002c-M680x0-1093"></a><a name="index-_0040samp_007b_002dm_005bno_002d_005dmac_007d-command-line-option_002c-M680x0-1094"></a><a name="index-_0040samp_007b_002dm_005bno_002d_005demac_007d-command-line-option_002c-M680x0-1095"></a><br><dt><span class="samp">-m[no-]68851</span><br><dt><span class="samp">-m[no-]68881</span><br><dt><span class="samp">-m[no-]div</span><br><dt><span class="samp">-m[no-]usp</span><br><dt><span class="samp">-m[no-]float</span><br><dt><span class="samp">-m[no-]mac</span><br><dt><span class="samp">-m[no-]emac</span><dd>
Enable or disable various architecture specific features. If a chip
or architecture by default supports an option (for instance
<span class="option">-march=isaaplus</span> includes the <span class="option">-mdiv</span> option),
explicitly disabling the option will override the default.
<p><a name="index-_0040samp_007b_002dl_007d-option_002c-M680x0-1096"></a><br><dt><span class="samp">-l</span><dd>You can use the <span class="samp">-l</span> option to shorten the size of references to undefined
symbols. If you do not use the <span class="samp">-l</span> option, references to undefined
symbols are wide enough for a full <code>long</code> (32 bits). (Since
<code>as</code> cannot know where these symbols end up, <code>as</code> can
only allocate space for the linker to fill in later. Since <code>as</code>
does not know how far away these symbols are, it allocates as much space as it
can.) If you use this option, the references are only one word wide (16 bits).
This may be useful if you want the object file to be as small as possible, and
you know that the relevant symbols are always less than 17 bits away.
<p><a name="index-_0040samp_007b_002d_002dregister_002dprefix_002doptional_007d-option_002c-M680x0-1097"></a><br><dt><span class="samp">--register-prefix-optional</span><dd>For some configurations, especially those where the compiler normally
does not prepend an underscore to the names of user variables, the
assembler requires a <span class="samp">%</span> before any use of a register name. This
is intended to let the assembler distinguish between C variables and
functions named <span class="samp">a0</span> through <span class="samp">a7</span>, and so on. The <span class="samp">%</span> is
always accepted, but is not required for certain configurations, notably
<span class="samp">sun3</span>. The <span class="samp">--register-prefix-optional</span> option may be used
to permit omitting the <span class="samp">%</span> even for configurations for which it is
normally required. If this is done, it will generally be impossible to
refer to C variables and functions with the same names as register
names.
<p><a name="index-_0040samp_007b_002d_002dbitwise_002dor_007d-option_002c-M680x0-1098"></a><br><dt><span class="samp">--bitwise-or</span><dd>Normally the character <span class="samp">|</span> is treated as a comment character, which
means that it can not be used in expressions. The <span class="samp">--bitwise-or</span>
option turns <span class="samp">|</span> into a normal character. In this mode, you must
either use C style comments, or start comments with a <span class="samp">#</span> character
at the beginning of a line.
<p><a name="index-_0040samp_007b_002d_002dbase_002dsize_002ddefault_002d16_007d-1099"></a><a name="index-_0040samp_007b_002d_002dbase_002dsize_002ddefault_002d32_007d-1100"></a><br><dt><span class="samp">--base-size-default-16 --base-size-default-32</span><dd>If you use an addressing mode with a base register without specifying
the size, <code>as</code> will normally use the full 32 bit value.
For example, the addressing mode <span class="samp">%a0@(%d0)</span> is equivalent to
<span class="samp">%a0@(%d0:l)</span>. You may use the <span class="samp">--base-size-default-16</span>
option to tell <code>as</code> to default to using the 16 bit value.
In this case, <span class="samp">%a0@(%d0)</span> is equivalent to <span class="samp">%a0@(%d0:w)</span>.
You may use the <span class="samp">--base-size-default-32</span> option to restore the
default behaviour.
<p><a name="index-_0040samp_007b_002d_002ddisp_002dsize_002ddefault_002d16_007d-1101"></a><a name="index-_0040samp_007b_002d_002ddisp_002dsize_002ddefault_002d32_007d-1102"></a><br><dt><span class="samp">--disp-size-default-16 --disp-size-default-32</span><dd>If you use an addressing mode with a displacement, and the value of the
displacement is not known, <code>as</code> will normally assume that
the value is 32 bits. For example, if the symbol <span class="samp">disp</span> has not
been defined, <code>as</code> will assemble the addressing mode
<span class="samp">%a0@(disp,%d0)</span> as though <span class="samp">disp</span> is a 32 bit value. You may
use the <span class="samp">--disp-size-default-16</span> option to tell <code>as</code>
to instead assume that the displacement is 16 bits. In this case,
<code>as</code> will assemble <span class="samp">%a0@(disp,%d0)</span> as though
<span class="samp">disp</span> is a 16 bit value. You may use the
<span class="samp">--disp-size-default-32</span> option to restore the default behaviour.
<p><a name="index-_0040samp_007b_002d_002dpcrel_007d-1103"></a><br><dt><span class="samp">--pcrel</span><dd>Always keep branches PC-relative. In the M680x0 architecture all branches
are defined as PC-relative. However, on some processors they are limited
to word displacements maximum. When <code>as</code> needs a long branch
that is not available, it normally emits an absolute jump instead. This
option disables this substitution. When this option is given and no long
branches are available, only word branches will be emitted. An error
message will be generated if a word branch cannot reach its target. This
option has no effect on 68020 and other processors that have long branches.
see <a href="M68K_002dBranch.html#M68K_002dBranch">Branch Improvement</a>.
<p><a name="index-_0040samp_007b_002dm68000_007d-and-related-options-1104"></a><a name="index-architecture-options_002c-M680x0-1105"></a><a name="index-M680x0-architecture-options-1106"></a><br><dt><span class="samp">-m68000</span><dd><code>as</code> can assemble code for several different members of the
Motorola 680x0 family. The default depends upon how <code>as</code>
was configured when it was built; normally, the default is to assemble
code for the 68020 microprocessor. The following options may be used to
change the default. These options control which instructions and
addressing modes are permitted. The members of the 680x0 family are
very similar. For detailed information about the differences, see the
Motorola manuals.
<dl>
<dt><span class="samp">-m68000</span><dt><span class="samp">-m68ec000</span><dt><span class="samp">-m68hc000</span><dt><span class="samp">-m68hc001</span><dt><span class="samp">-m68008</span><dt><span class="samp">-m68302</span><dt><span class="samp">-m68306</span><dt><span class="samp">-m68307</span><dt><span class="samp">-m68322</span><dt><span class="samp">-m68356</span><dd>Assemble for the 68000. <span class="samp">-m68008</span>, <span class="samp">-m68302</span>, and so on are synonyms
for <span class="samp">-m68000</span>, since the chips are the same from the point of view
of the assembler.
<br><dt><span class="samp">-m68010</span><dd>Assemble for the 68010.
<br><dt><span class="samp">-m68020</span><dt><span class="samp">-m68ec020</span><dd>Assemble for the 68020. This is normally the default.
<br><dt><span class="samp">-m68030</span><dt><span class="samp">-m68ec030</span><dd>Assemble for the 68030.
<br><dt><span class="samp">-m68040</span><dt><span class="samp">-m68ec040</span><dd>Assemble for the 68040.
<br><dt><span class="samp">-m68060</span><dt><span class="samp">-m68ec060</span><dd>Assemble for the 68060.
<br><dt><span class="samp">-mcpu32</span><dt><span class="samp">-m68330</span><dt><span class="samp">-m68331</span><dt><span class="samp">-m68332</span><dt><span class="samp">-m68333</span><dt><span class="samp">-m68334</span><dt><span class="samp">-m68336</span><dt><span class="samp">-m68340</span><dt><span class="samp">-m68341</span><dt><span class="samp">-m68349</span><dt><span class="samp">-m68360</span><dd>Assemble for the CPU32 family of chips.
<br><dt><span class="samp">-m5200</span><br><dt><span class="samp">-m5202</span><br><dt><span class="samp">-m5204</span><br><dt><span class="samp">-m5206</span><br><dt><span class="samp">-m5206e</span><br><dt><span class="samp">-m521x</span><br><dt><span class="samp">-m5249</span><br><dt><span class="samp">-m528x</span><br><dt><span class="samp">-m5307</span><br><dt><span class="samp">-m5407</span><br><dt><span class="samp">-m547x</span><br><dt><span class="samp">-m548x</span><br><dt><span class="samp">-mcfv4</span><br><dt><span class="samp">-mcfv4e</span><dd>Assemble for the ColdFire family of chips.
<br><dt><span class="samp">-m68881</span><dt><span class="samp">-m68882</span><dd>Assemble 68881 floating point instructions. This is the default for the
68020, 68030, and the CPU32. The 68040 and 68060 always support
floating point instructions.
<br><dt><span class="samp">-mno-68881</span><dd>Do not assemble 68881 floating point instructions. This is the default
for 68000 and the 68010. The 68040 and 68060 always support floating
point instructions, even if this option is used.
<br><dt><span class="samp">-m68851</span><dd>Assemble 68851 MMU instructions. This is the default for the 68020,
68030, and 68060. The 68040 accepts a somewhat different set of MMU
instructions; <span class="samp">-m68851</span> and <span class="samp">-m68040</span> should not be used
together.
<br><dt><span class="samp">-mno-68851</span><dd>Do not assemble 68851 MMU instructions. This is the default for the
68000, 68010, and the CPU32. The 68040 accepts a somewhat different set
of MMU instructions.
</dl>
</dl>
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