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<h4 class="subsection">9.20.2 Syntax</h4>
<p><a name="index-_0040sc_007bmit_007d-1107"></a>This syntax for the Motorola 680x0 was developed at <span class="sc">mit</span>.
<p><a name="index-M680x0-syntax-1108"></a><a name="index-syntax_002c-M680x0-1109"></a><a name="index-M680x0-size-modifiers-1110"></a><a name="index-size-modifiers_002c-M680x0-1111"></a>The 680x0 version of <code>as</code> uses instructions names and
syntax compatible with the Sun assembler. Intervening periods are
ignored; for example, <span class="samp">movl</span> is equivalent to <span class="samp">mov.l</span>.
<p>In the following table <var>apc</var> stands for any of the address registers
(<span class="samp">%a0</span> through <span class="samp">%a7</span>), the program counter (<span class="samp">%pc</span>), the
zero-address relative to the program counter (<span class="samp">%zpc</span>), a suppressed
address register (<span class="samp">%za0</span> through <span class="samp">%za7</span>), or it may be omitted
entirely. The use of <var>size</var> means one of <span class="samp">w</span> or <span class="samp">l</span>, and
it may be omitted, along with the leading colon, unless a scale is also
specified. The use of <var>scale</var> means one of <span class="samp">1</span>, <span class="samp">2</span>,
<span class="samp">4</span>, or <span class="samp">8</span>, and it may always be omitted along with the
leading colon.
<p><a name="index-M680x0-addressing-modes-1112"></a><a name="index-addressing-modes_002c-M680x0-1113"></a>The following addressing modes are understood:
<dl>
<dt><dfn>Immediate</dfn><dd><span class="samp">#</span><var>number</var>
<br><dt><dfn>Data Register</dfn><dd><span class="samp">%d0</span> through <span class="samp">%d7</span>
<br><dt><dfn>Address Register</dfn><dd><span class="samp">%a0</span> through <span class="samp">%a7</span><br>
<span class="samp">%a7</span> is also known as <span class="samp">%sp</span>, i.e., the Stack Pointer. <code>%a6</code>
is also known as <span class="samp">%fp</span>, the Frame Pointer.
<br><dt><dfn>Address Register Indirect</dfn><dd><span class="samp">%a0@</span> through <span class="samp">%a7@</span>
<br><dt><dfn>Address Register Postincrement</dfn><dd><span class="samp">%a0@+</span> through <span class="samp">%a7@+</span>
<br><dt><dfn>Address Register Predecrement</dfn><dd><span class="samp">%a0@-</span> through <span class="samp">%a7@-</span>
<br><dt><dfn>Indirect Plus Offset</dfn><dd><var>apc</var><span class="samp">@(</span><var>number</var><span class="samp">)</span>
<br><dt><dfn>Index</dfn><dd><var>apc</var><span class="samp">@(</span><var>number</var><span class="samp">,</span><var>register</var><span class="samp">:</span><var>size</var><span class="samp">:</span><var>scale</var><span class="samp">)</span>
<p>The <var>number</var> may be omitted.
<br><dt><dfn>Postindex</dfn><dd><var>apc</var><span class="samp">@(</span><var>number</var><span class="samp">)@(</span><var>onumber</var><span class="samp">,</span><var>register</var><span class="samp">:</span><var>size</var><span class="samp">:</span><var>scale</var><span class="samp">)</span>
<p>The <var>onumber</var> or the <var>register</var>, but not both, may be omitted.
<br><dt><dfn>Preindex</dfn><dd><var>apc</var><span class="samp">@(</span><var>number</var><span class="samp">,</span><var>register</var><span class="samp">:</span><var>size</var><span class="samp">:</span><var>scale</var><span class="samp">)@(</span><var>onumber</var><span class="samp">)</span>
<p>The <var>number</var> may be omitted. Omitting the <var>register</var> produces
the Postindex addressing mode.
<br><dt><dfn>Absolute</dfn><dd><var>symbol</var>, or <var>digits</var>, optionally followed by
<span class="samp">:b</span>, <span class="samp">:w</span>, or <span class="samp">:l</span>.
</dl>
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