The assembler normally performs the following other relaxations. They
can be disabled by using underscore prefixes (see Opcode Names), the --no-transform command-line option
(see Command Line Options), or the
no-transform directive (see transform).
The MOVI machine instruction can only materialize values in the
range from -2048 to 2047. Values outside this range are best
materialized with L32R instructions. Thus:
movi a0, 100000
is assembled into the following machine code:
.literal .L1, 100000
l32r a0, .L1
The L8UI machine instruction can only be used with immediate
offsets in the range from 0 to 255. The L16SI and L16UI
machine instructions can only be used with offsets from 0 to 510. The
L32I machine instruction can only be used with offsets from 0 to
1020. A load offset outside these ranges can be materialized with
an L32R instruction if the destination register of the load
is different than the source address register. For example:
l32i a1, a0, 2040
is translated to:
.literal .L1, 2040
l32r a1, .L1
add a1, a0, a1
l32i a1, a1, 0
If the load destination and source address register are the same, an out-of-range offset causes an error.
The Xtensa ADDI instruction only allows immediate operands in the
range from -128 to 127. There are a number of alternate instruction
sequences for the ADDI operation. First, if the
immediate is 0, the ADDI will be turned into a MOV.N
instruction (or the equivalent OR instruction if the code density
option is not available). If the ADDI immediate is outside of
the range -128 to 127, but inside the range -32896 to 32639, an
ADDMI instruction or ADDMI/ADDI sequence will be
used. Finally, if the immediate is outside of this range and a free
register is available, an L32R/ADD sequence will be used
with a literal allocated from the literal pool.
For example:
addi a5, a6, 0
addi a5, a6, 512
addi a5, a6, 513
addi a5, a6, 50000
is assembled into the following:
.literal .L1, 50000
mov.n a5, a6
addmi a5, a6, 0x200
addmi a5, a6, 0x200
addi a5, a5, 1
l32r a5, .L1
add a5, a6, a5