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<title>i386-Arch - Using as</title>
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<!--
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This file documents the GNU Assembler "as".
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Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002,
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2006, 2007 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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<p>
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<a name="i386_002dArch"></a>Next: <a rel="next" accesskey="n" href="i386_002dBugs.html#i386_002dBugs">i386-Bugs</a>,
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Previous: <a rel="previous" accesskey="p" href="i386_002d16bit.html#i386_002d16bit">i386-16bit</a>,
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Up: <a rel="up" accesskey="u" href="i386_002dDependent.html#i386_002dDependent">i386-Dependent</a>
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<hr><br>
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</div>
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<h4 class="subsection">9.13.14 Specifying CPU Architecture</h4>
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<p><a name="index-arch-directive_002c-i386-957"></a><a name="index-i386-arch-directive-958"></a><a name="index-arch-directive_002c-x86_002d64-959"></a><a name="index-x86_002d64-arch-directive-960"></a>
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<code>as</code> may be told to assemble for a particular CPU
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(sub-)architecture with the <code>.arch </code><var>cpu_type</var> directive. This
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directive enables a warning when gas detects an instruction that is not
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supported on the CPU specified. The choices for <var>cpu_type</var> are:
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<p><table summary=""><tr align="left"><td valign="top" width="20%"><span class="samp">i8086</span> </td><td valign="top" width="20%"><span class="samp">i186</span> </td><td valign="top" width="20%"><span class="samp">i286</span> </td><td valign="top" width="20%"><span class="samp">i386</span>
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<br></td></tr><tr align="left"><td valign="top" width="20%"><span class="samp">i486</span> </td><td valign="top" width="20%"><span class="samp">i586</span> </td><td valign="top" width="20%"><span class="samp">i686</span> </td><td valign="top" width="20%"><span class="samp">pentium</span>
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<br></td></tr><tr align="left"><td valign="top" width="20%"><span class="samp">pentiumpro</span> </td><td valign="top" width="20%"><span class="samp">pentiumii</span> </td><td valign="top" width="20%"><span class="samp">pentiumiii</span> </td><td valign="top" width="20%"><span class="samp">pentium4</span>
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<br></td></tr><tr align="left"><td valign="top" width="20%"><span class="samp">prescott</span> </td><td valign="top" width="20%"><span class="samp">nocona</span> </td><td valign="top" width="20%"><span class="samp">core</span> </td><td valign="top" width="20%"><span class="samp">core2</span>
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<br></td></tr><tr align="left"><td valign="top" width="20%"><span class="samp">k6</span> </td><td valign="top" width="20%"><span class="samp">k6_2</span> </td><td valign="top" width="20%"><span class="samp">athlon</span> </td><td valign="top" width="20%"><span class="samp">k8</span>
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<br></td></tr><tr align="left"><td valign="top" width="20%"><span class="samp">amdfam10</span>
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<br></td></tr><tr align="left"><td valign="top" width="20%"><span class="samp">generic32</span> </td><td valign="top" width="20%"><span class="samp">generic64</span>
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<br></td></tr><tr align="left"><td valign="top" width="20%"><span class="samp">.mmx</span> </td><td valign="top" width="20%"><span class="samp">.sse</span> </td><td valign="top" width="20%"><span class="samp">.sse2</span> </td><td valign="top" width="20%"><span class="samp">.sse3</span>
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<br></td></tr><tr align="left"><td valign="top" width="20%"><span class="samp">.ssse3</span> </td><td valign="top" width="20%"><span class="samp">.sse4.1</span> </td><td valign="top" width="20%"><span class="samp">.sse4.2</span> </td><td valign="top" width="20%"><span class="samp">.sse4</span>
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<br></td></tr><tr align="left"><td valign="top" width="20%"><span class="samp">.avx</span> </td><td valign="top" width="20%"><span class="samp">.vmx</span> </td><td valign="top" width="20%"><span class="samp">.smx</span> </td><td valign="top" width="20%"><span class="samp">.xsave</span>
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<br></td></tr><tr align="left"><td valign="top" width="20%"><span class="samp">.aes</span> </td><td valign="top" width="20%"><span class="samp">.pclmul</span> </td><td valign="top" width="20%"><span class="samp">.fma</span> </td><td valign="top" width="20%"><span class="samp">.movbe</span>
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<br></td></tr><tr align="left"><td valign="top" width="20%"><span class="samp">.ept</span>
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<br></td></tr><tr align="left"><td valign="top" width="20%"><span class="samp">.3dnow</span> </td><td valign="top" width="20%"><span class="samp">.3dnowa</span> </td><td valign="top" width="20%"><span class="samp">.sse4a</span> </td><td valign="top" width="20%"><span class="samp">.sse5</span>
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<br></td></tr><tr align="left"><td valign="top" width="20%"><span class="samp">.svme</span> </td><td valign="top" width="20%"><span class="samp">.abm</span>
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<br></td></tr><tr align="left"><td valign="top" width="20%"><span class="samp">.padlock</span>
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<br></td></tr></table>
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<p>Apart from the warning, there are only two other effects on
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<code>as</code> operation; Firstly, if you specify a CPU other than
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<span class="samp">i486</span>, then shift by one instructions such as <span class="samp">sarl $1, %eax</span>
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will automatically use a two byte opcode sequence. The larger three
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byte opcode sequence is used on the 486 (and when no architecture is
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specified) because it executes faster on the 486. Note that you can
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explicitly request the two byte opcode by writing <span class="samp">sarl %eax</span>.
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Secondly, if you specify <span class="samp">i8086</span>, <span class="samp">i186</span>, or <span class="samp">i286</span>,
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<em>and</em> <span class="samp">.code16</span> or <span class="samp">.code16gcc</span> then byte offset
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conditional jumps will be promoted when necessary to a two instruction
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sequence consisting of a conditional jump of the opposite sense around
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an unconditional jump to the target.
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<p>Following the CPU architecture (but not a sub-architecture, which are those
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starting with a dot), you may specify <span class="samp">jumps</span> or <span class="samp">nojumps</span> to
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control automatic promotion of conditional jumps. <span class="samp">jumps</span> is the
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default, and enables jump promotion; All external jumps will be of the long
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variety, and file-local jumps will be promoted as necessary.
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(see <a href="i386_002dJumps.html#i386_002dJumps">i386-Jumps</a>) <span class="samp">nojumps</span> leaves external conditional jumps as
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byte offset jumps, and warns about file-local conditional jumps that
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<code>as</code> promotes.
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Unconditional jumps are treated as for <span class="samp">jumps</span>.
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<p>For example
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<pre class="smallexample"> .arch i8086,nojumps
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</pre>
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