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192 lines
4.7 KiB
C
192 lines
4.7 KiB
C
/*
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* ----------------------------------------------------------------------------
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* "THE BEER-WARE LICENSE" (Revision 42):
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* <joerg@FreeBSD.ORG> wrote this file. As long as you retain this notice you
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* can do whatever you want with this stuff. If we meet some day, and you think
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* this stuff is worth it, you can buy me a beer in return. Joerg Wunsch
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* ----------------------------------------------------------------------------
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*
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* HD44780 LCD display driver
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*
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* The LCD controller is used in 4-bit mode with a full bi-directional
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* interface (i.e. R/~W is connected) so the busy flag can be read.
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*
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* $Id: hd44780.c,v 1.3 2006/10/08 21:47:36 joerg_wunsch Exp $
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*/
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#include "defines.h"
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#include <stdbool.h>
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#include <stdint.h>
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#include <avr/io.h>
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#include <util/delay.h>
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#include "hd44780.h"
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#define GLUE(a, b) a##b
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#define PORT(x) GLUE(PORT, x)
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#define PIN(x) GLUE(PIN, x)
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#define DDR(x) GLUE(DDR, x)
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#define HD44780_PORTOUT PORT(HD44780_PORT)
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#define HD44780_PORTIN PIN(HD44780_PORT)
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#define HD44780_DDR DDR(HD44780_PORT)
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#define HD44780_DATABITS \
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(_BV(HD44780_D4)|_BV(HD44780_D5)|_BV(HD44780_D6)|_BV(HD44780_D7))
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#define HD44780_BUSYFLAG 0x80
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/*
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* Send one pulse to the E signal (enable). Mind the timing
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* constraints. If readback is set to true, read the HD44780 data
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* pins right before the falling edge of E, and return that value.
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*/
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static inline uint8_t
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hd44780_pulse_e(bool readback) __attribute__((always_inline));
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static inline uint8_t
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hd44780_pulse_e(bool readback)
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{
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uint8_t x;
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HD44780_PORTOUT |= _BV(HD44780_E);
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/*
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* Guarantee at least 500 ns of pulse width. For high CPU
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* frequencies, a delay loop is used. For lower frequencies, NOPs
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* are used, and at or below 1 MHz, the native pulse width will
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* already be 1 us or more so no additional delays are needed.
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*/
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#if F_CPU > 4000000UL
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_delay_us(0.5);
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#else
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/*
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* When reading back, we need one additional NOP, as the value read
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* back from the input pin is sampled close to the beginning of a
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* CPU clock cycle, while the previous edge on the output pin is
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* generated towards the end of a CPU clock cycle.
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*/
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if (readback)
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__asm__ volatile("nop");
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# if F_CPU > 1000000UL
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__asm__ volatile("nop");
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# if F_CPU > 2000000UL
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__asm__ volatile("nop");
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__asm__ volatile("nop");
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# endif /* F_CPU > 2000000UL */
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# endif /* F_CPU > 1000000UL */
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#endif
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if (readback)
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x = HD44780_PORTIN & HD44780_DATABITS;
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else
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x = 0;
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HD44780_PORTOUT &= ~_BV(HD44780_E);
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return x;
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}
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/*
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* Send one nibble out to the LCD controller.
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*/
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static void
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hd44780_outnibble(uint8_t n, uint8_t rs)
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{
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uint8_t x;
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HD44780_PORTOUT &= ~_BV(HD44780_RW);
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if (rs)
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HD44780_PORTOUT |= _BV(HD44780_RS);
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else
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HD44780_PORTOUT &= ~_BV(HD44780_RS);
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x = (HD44780_PORTOUT & ~HD44780_DATABITS) | ((n << HD44780_D4) & HD44780_DATABITS);
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HD44780_PORTOUT = x;
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(void)hd44780_pulse_e(false);
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}
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/*
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* Send one byte to the LCD controller. As we are in 4-bit mode, we
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* have to send two nibbles.
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*/
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void
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hd44780_outbyte(uint8_t b, uint8_t rs)
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{
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hd44780_outnibble(b >> 4, rs);
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hd44780_outnibble(b & 0xf, rs);
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}
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/*
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* Read one nibble from the LCD controller.
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*/
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static uint8_t
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hd44780_innibble(uint8_t rs)
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{
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uint8_t x;
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HD44780_PORTOUT |= _BV(HD44780_RW);
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HD44780_DDR &= ~HD44780_DATABITS;
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if (rs)
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HD44780_PORTOUT |= _BV(HD44780_RS);
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else
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HD44780_PORTOUT &= ~_BV(HD44780_RS);
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x = hd44780_pulse_e(true);
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HD44780_DDR |= HD44780_DATABITS;
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HD44780_PORTOUT &= ~_BV(HD44780_RW);
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return (x & HD44780_DATABITS) >> HD44780_D4;
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}
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/*
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* Read one byte (i.e. two nibbles) from the LCD controller.
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*/
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uint8_t
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hd44780_inbyte(uint8_t rs)
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{
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uint8_t x;
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x = hd44780_innibble(rs) << 4;
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x |= hd44780_innibble(rs);
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return x;
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}
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/*
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* Wait until the busy flag is cleared.
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*/
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void
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hd44780_wait_ready(void)
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{
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while (hd44780_incmd() & HD44780_BUSYFLAG) ;
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}
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/*
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* Initialize the LCD controller.
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*
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* The initialization sequence has a mandatory timing so the
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* controller can safely recognize the type of interface desired.
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* This is the only area where timed waits are really needed as
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* the busy flag cannot be probed initially.
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*/
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void
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hd44780_init(void)
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{
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HD44780_DDR = _BV(HD44780_RS) | _BV(HD44780_RW) | _BV(HD44780_E)
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| HD44780_DATABITS;
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_delay_ms(15); /* 40 ms needed for Vcc = 2.7 V */
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hd44780_outnibble(HD44780_FNSET(1, 0, 0) >> 4, 0);
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_delay_ms(4.1);
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hd44780_outnibble(HD44780_FNSET(1, 0, 0) >> 4, 0);
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_delay_ms(0.1);
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hd44780_outnibble(HD44780_FNSET(1, 0, 0) >> 4, 0);
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hd44780_outnibble(HD44780_FNSET(0, 1, 0) >> 4, 0);
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hd44780_wait_ready();
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hd44780_outcmd(HD44780_FNSET(0, 1, 0));
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hd44780_wait_ready();
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hd44780_outcmd(HD44780_DISPCTL(0, 0, 0));
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hd44780_wait_ready();
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}
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