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<p>
<a name="M68HC11_002dSyntax"></a>Next:&nbsp;<a rel="next" accesskey="n" href="M68HC11_002dModifiers.html#M68HC11_002dModifiers">M68HC11-Modifiers</a>,
Previous:&nbsp;<a rel="previous" accesskey="p" href="M68HC11_002dOpts.html#M68HC11_002dOpts">M68HC11-Opts</a>,
Up:&nbsp;<a rel="up" accesskey="u" href="M68HC11_002dDependent.html#M68HC11_002dDependent">M68HC11-Dependent</a>
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<h4 class="subsection">9.21.2 Syntax</h4>
<p><a name="index-M68HC11-syntax-1159"></a><a name="index-syntax_002c-M68HC11-1160"></a>
In the M68HC11 syntax, the instruction name comes first and it may
be followed by one or several operands (up to three). Operands are
separated by comma (<span class="samp">,</span>). In the normal mode,
<code>as</code> will complain if too many operands are specified for
a given instruction. In the MRI mode (turned on with <span class="samp">-M</span> option),
it will treat them as comments. Example:
<pre class="smallexample"> inx
lda #23
bset 2,x #4
brclr *bot #8 foo
</pre>
<p><a name="index-M68HC11-addressing-modes-1161"></a><a name="index-addressing-modes_002c-M68HC11-1162"></a>The following addressing modes are understood for 68HC11 and 68HC12:
<dl>
<dt><dfn>Immediate</dfn><dd><span class="samp">#</span><var>number</var>
<br><dt><dfn>Address Register</dfn><dd><var>number</var><span class="samp">,X</span>, <var>number</var><span class="samp">,Y</span>
<p>The <var>number</var> may be omitted in which case 0 is assumed.
<br><dt><dfn>Direct Addressing mode</dfn><dd><span class="samp">*</span><var>symbol</var>, or <span class="samp">*</span><var>digits</var>
<br><dt><dfn>Absolute</dfn><dd><var>symbol</var>, or <var>digits</var>
</dl>
<p>The M68HC12 has other more complex addressing modes. All of them
are supported and they are represented below:
<dl>
<dt><dfn>Constant Offset Indexed Addressing Mode</dfn><dd><var>number</var><span class="samp">,</span><var>reg</var>
<p>The <var>number</var> may be omitted in which case 0 is assumed.
The register can be either <span class="samp">X</span>, <span class="samp">Y</span>, <span class="samp">SP</span> or
<span class="samp">PC</span>. The assembler will use the smaller post-byte definition
according to the constant value (5-bit constant offset, 9-bit constant
offset or 16-bit constant offset). If the constant is not known by
the assembler it will use the 16-bit constant offset post-byte and the value
will be resolved at link time.
<br><dt><dfn>Offset Indexed Indirect</dfn><dd><span class="samp">[</span><var>number</var><span class="samp">,</span><var>reg</var><span class="samp">]</span>
<p>The register can be either <span class="samp">X</span>, <span class="samp">Y</span>, <span class="samp">SP</span> or <span class="samp">PC</span>.
<br><dt><dfn>Auto Pre-Increment/Pre-Decrement/Post-Increment/Post-Decrement</dfn><dd><var>number</var><span class="samp">,-</span><var>reg</var>
<var>number</var><span class="samp">,+</span><var>reg</var>
<var>number</var><span class="samp">,</span><var>reg</var><span class="samp">-</span>
<var>number</var><span class="samp">,</span><var>reg</var><span class="samp">+</span>
<p>The number must be in the range <span class="samp">-8</span>..<span class="samp">+8</span> and must not be 0.
The register can be either <span class="samp">X</span>, <span class="samp">Y</span>, <span class="samp">SP</span> or <span class="samp">PC</span>.
<br><dt><dfn>Accumulator Offset</dfn><dd><var>acc</var><span class="samp">,</span><var>reg</var>
<p>The accumulator register can be either <span class="samp">A</span>, <span class="samp">B</span> or <span class="samp">D</span>.
The register can be either <span class="samp">X</span>, <span class="samp">Y</span>, <span class="samp">SP</span> or <span class="samp">PC</span>.
<br><dt><dfn>Accumulator D offset indexed-indirect</dfn><dd><span class="samp">[D,</span><var>reg</var><span class="samp">]</span>
<p>The register can be either <span class="samp">X</span>, <span class="samp">Y</span>, <span class="samp">SP</span> or <span class="samp">PC</span>.
</dl>
<p>For example:
<pre class="smallexample"> ldab 1024,sp
ldd [10,x]
orab 3,+x
stab -2,y-
ldx a,pc
sty [d,sp]
</pre>
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