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<a name="i386_002dOptions"></a>Next:&nbsp;<a rel="next" accesskey="n" href="i386_002dDirectives.html#i386_002dDirectives">i386-Directives</a>,
Up:&nbsp;<a rel="up" accesskey="u" href="i386_002dDependent.html#i386_002dDependent">i386-Dependent</a>
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<h4 class="subsection">9.13.1 Options</h4>
<p><a name="index-options-for-i386-817"></a><a name="index-options-for-x86_002d64-818"></a><a name="index-i386-options-819"></a><a name="index-x86_002d64-options-820"></a>
The i386 version of <code>as</code> has a few machine
dependent options:
<a name="index-_0040samp_007b_002d_002d32_007d-option_002c-i386-821"></a>
<a name="index-_0040samp_007b_002d_002d32_007d-option_002c-x86_002d64-822"></a>
<a name="index-_0040samp_007b_002d_002d64_007d-option_002c-i386-823"></a>
<a name="index-_0040samp_007b_002d_002d64_007d-option_002c-x86_002d64-824"></a>
<dl><dt><code>--32 | --64</code><dd>Select the word size, either 32 bits or 64 bits. Selecting 32-bit
implies Intel i386 architecture, while 64-bit implies AMD x86-64
architecture.
<p>These options are only available with the ELF object file format, and
require that the necessary BFD support has been included (on a 32-bit
platform you have to add &ndash;enable-64-bit-bfd to configure enable 64-bit
usage and use x86-64 as target platform).
<br><dt><code>-n</code><dd>By default, x86 GAS replaces multiple nop instructions used for
alignment within code sections with multi-byte nop instructions such
as leal 0(%esi,1),%esi. This switch disables the optimization.
<p><a name="index-_0040samp_007b_002d_002ddivide_007d-option_002c-i386-825"></a><br><dt><code>--divide</code><dd>On SVR4-derived platforms, the character <span class="samp">/</span> is treated as a comment
character, which means that it cannot be used in expressions. The
<span class="samp">--divide</span> option turns <span class="samp">/</span> into a normal character. This does
not disable <span class="samp">/</span> at the beginning of a line starting a comment, or
affect using <span class="samp">#</span> for starting a comment.
<p><a name="index-_0040samp_007b_002dmarch_003d_007d-option_002c-i386-826"></a><a name="index-_0040samp_007b_002dmarch_003d_007d-option_002c-x86_002d64-827"></a><br><dt><code>-march=</code><var>CPU</var><code>[+</code><var>EXTENSION</var><code>...]</code><dd>This option specifies the target processor. The assembler will
issue an error message if an attempt is made to assemble an instruction
which will not execute on the target processor. The following
processor names are recognized:
<code>i8086</code>,
<code>i186</code>,
<code>i286</code>,
<code>i386</code>,
<code>i486</code>,
<code>i586</code>,
<code>i686</code>,
<code>pentium</code>,
<code>pentiumpro</code>,
<code>pentiumii</code>,
<code>pentiumiii</code>,
<code>pentium4</code>,
<code>prescott</code>,
<code>nocona</code>,
<code>core</code>,
<code>core2</code>,
<code>k6</code>,
<code>k6_2</code>,
<code>athlon</code>,
<code>opteron</code>,
<code>k8</code>,
<code>amdfam10</code>,
<code>generic32</code> and
<code>generic64</code>.
<p>In addition to the basic instruction set, the assembler can be told to
accept various extension mnemonics. For example,
<code>-march=i686+sse4+vmx</code> extends <var>i686</var> with <var>sse4</var> and
<var>vmx</var>. The following extensions are currently supported:
<code>mmx</code>,
<code>sse</code>,
<code>sse2</code>,
<code>sse3</code>,
<code>ssse3</code>,
<code>sse4.1</code>,
<code>sse4.2</code>,
<code>sse4</code>,
<code>avx</code>,
<code>vmx</code>,
<code>smx</code>,
<code>xsave</code>,
<code>aes</code>,
<code>pclmul</code>,
<code>fma</code>,
<code>movbe</code>,
<code>ept</code>,
<code>3dnow</code>,
<code>3dnowa</code>,
<code>sse4a</code>,
<code>sse5</code>,
<code>svme</code>,
<code>abm</code> and
<code>padlock</code>.
<p>When the <code>.arch</code> directive is used with <span class="option">-march</span>, the
<code>.arch</code> directive will take precedent.
<p><a name="index-_0040samp_007b_002dmtune_003d_007d-option_002c-i386-828"></a><a name="index-_0040samp_007b_002dmtune_003d_007d-option_002c-x86_002d64-829"></a><br><dt><code>-mtune=</code><var>CPU</var><dd>This option specifies a processor to optimize for. When used in
conjunction with the <span class="option">-march</span> option, only instructions
of the processor specified by the <span class="option">-march</span> option will be
generated.
<p>Valid <var>CPU</var> values are identical to the processor list of
<span class="option">-march=</span><var>CPU</var>.
<p><a name="index-_0040samp_007b_002dmsse2avx_007d-option_002c-i386-830"></a><a name="index-_0040samp_007b_002dmsse2avx_007d-option_002c-x86_002d64-831"></a><br><dt><code>-msse2avx</code><dd>This option specifies that the assembler should encode SSE instructions
with VEX prefix.
<p><a name="index-_0040samp_007b_002dmsse_002dcheck_003d_007d-option_002c-i386-832"></a><a name="index-_0040samp_007b_002dmsse_002dcheck_003d_007d-option_002c-x86_002d64-833"></a><br><dt><code>-msse-check=</code><var>none</var><br><dt><code>-msse-check=</code><var>warning</var><br><dt><code>-msse-check=</code><var>error</var><dd>These options control if the assembler should check SSE intructions.
<span class="option">-msse-check=</span><var>none</var> will make the assembler not to check SSE
instructions, which is the default. <span class="option">-msse-check=</span><var>warning</var>
will make the assembler issue a warning for any SSE intruction.
<span class="option">-msse-check=</span><var>error</var> will make the assembler issue an error
for any SSE intruction.
<p><a name="index-_0040samp_007b_002dmmnemonic_003d_007d-option_002c-i386-834"></a><a name="index-_0040samp_007b_002dmmnemonic_003d_007d-option_002c-x86_002d64-835"></a><br><dt><code>-mmnemonic=</code><var>att</var><br><dt><code>-mmnemonic=</code><var>intel</var><dd>This option specifies instruction mnemonic for matching instructions.
The <code>.att_mnemonic</code> and <code>.intel_mnemonic</code> directives will
take precedent.
<p><a name="index-_0040samp_007b_002dmsyntax_003d_007d-option_002c-i386-836"></a><a name="index-_0040samp_007b_002dmsyntax_003d_007d-option_002c-x86_002d64-837"></a><br><dt><code>-msyntax=</code><var>att</var><br><dt><code>-msyntax=</code><var>intel</var><dd>This option specifies instruction syntax when processing instructions.
The <code>.att_syntax</code> and <code>.intel_syntax</code> directives will
take precedent.
<p><a name="index-_0040samp_007b_002dmnaked_002dreg_007d-option_002c-i386-838"></a><a name="index-_0040samp_007b_002dmnaked_002dreg_007d-option_002c-x86_002d64-839"></a><br><dt><code>-mnaked-reg</code><dd>This opetion specifies that registers don't require a <span class="samp">%</span> prefix.
The <code>.att_syntax</code> and <code>.intel_syntax</code> directives will take precedent.
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