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<a name="Options_002di860"></a>Next:&nbsp;<a rel="next" accesskey="n" href="Directives_002di860.html#Directives_002di860">Directives-i860</a>,
Previous:&nbsp;<a rel="previous" accesskey="p" href="Notes_002di860.html#Notes_002di860">Notes-i860</a>,
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<h4 class="subsection">9.14.2 i860 Command-line Options</h4>
<h5 class="subsubsection">9.14.2.1 SVR4 compatibility options</h5>
<dl>
<dt><code>-V</code><dd>Print assembler version.
<br><dt><code>-Qy</code><dd>Ignored.
<br><dt><code>-Qn</code><dd>Ignored.
</dl>
<h5 class="subsubsection">9.14.2.2 Other options</h5>
<dl>
<dt><code>-EL</code><dd>Select little endian output (this is the default).
<br><dt><code>-EB</code><dd>Select big endian output. Note that the i860 always reads instructions
as little endian data, so this option only effects data and not
instructions.
<br><dt><code>-mwarn-expand</code><dd>Emit a warning message if any pseudo-instruction expansions occurred.
For example, a <code>or</code> instruction with an immediate larger than 16-bits
will be expanded into two instructions. This is a very undesirable feature to
rely on, so this flag can help detect any code where it happens. One
use of it, for instance, has been to find and eliminate any place
where <code>gcc</code> may emit these pseudo-instructions.
<br><dt><code>-mxp</code><dd>Enable support for the i860XP instructions and control registers. By default,
this option is disabled so that only the base instruction set (i.e., i860XR)
is supported.
<br><dt><code>-mintel-syntax</code><dd>The i860 assembler defaults to AT&amp;T/SVR4 syntax. This option enables the
Intel syntax.
</dl>
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