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147 lines
3.6 KiB
C
147 lines
3.6 KiB
C
/*
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* ----------------------------------------------------------------------------
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* "THE BEER-WARE LICENSE" (Revision 42):
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* Joerg Wunsch wrote this file. As long as you retain this notice you
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* can do whatever you want with this stuff. If we meet some day, and you think
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* this stuff is worth it, you can buy me a beer in return. Joerg Wunsch
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* ----------------------------------------------------------------------------
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*
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* Demo combining C and assembly source files.
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*
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* This demo implements an RC model type PWM decoder. The incoming
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* PWM signal consists of a pulse sequence with a pulse width of 920
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* microseconds up to 2120 microseconds (1520 microseconds being the
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* neutral point). Depending on the value of the decoded incoming
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* PWM, an outgoing PWM is controlled between 0 and 100 %.
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*
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* The project is intented to be run on an ATtiny13 that has only one
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* timer channel (timer 0), so both the incoming signal discrimination
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* as well as the outgoing PWM need to run on the same timer.
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*
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* For verification purposes, the same project can also be run on an
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* ATtiny25/45/85, where timer 1 can be used to evaluate the incoming
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* PWM signal, and timer 0 to generate the outgoing PWM. In that
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* case, no additional assembly code is needed.
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*
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* $Id: asmdemo.c,v 1.1 2006/08/29 19:45:06 joerg_wunsch Exp $
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*/
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/*
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* This is the main C source file for the demo.
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*/
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#include <avr/interrupt.h>
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#include <avr/io.h>
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#include <avr/sleep.h>
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#include "project.h"
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volatile uint16_t pwm_incoming;
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volatile struct
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{
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uint8_t pwm_received: 1;
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}
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intbits;
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void
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ioinit(void)
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{
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counter_hi = 0;
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flags = 0;
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/*
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* Timer 0 runs as phase-correct PWM at full clock, OC0B connects to
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* the PWM engine.
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*/
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TCCR0A = (1 << COM0B1) | (1 << WGM00);
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TCCR0B = (1 << CS00);
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OCR0A = 255;
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#if defined(__AVR_ATtiny13__)
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TIMSK0 = (1 << TOIE0) | (1 << OCIE0A);
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# define F_CPU 1200000ul
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/* Minimal PWM pulse width is 920 us. */
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# define MIN_PWM_VAL ((920ul * F_CPU) / 1000000ul)
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/* Maximal PWM pulse width is 2120 us */
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# define MAX_PWM_VAL ((2120ul * F_CPU) / 1000000ul)
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#elif defined(__AVR_ATtiny25__) ||\
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defined(__AVR_ATtiny45__) ||\
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defined(__AVR_ATtiny85__)
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# define F_CPU 1000000ul
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/*
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* We use a prescaler of 16 here to avoid the 32-bit calculations
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* below.
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*/
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/* Minimal PWM pulse width is 920 us. */
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# define MIN_PWM_VAL ((920ul * F_CPU) / 16 / 1000000ul)
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/* Maximal PWM pulse width is 2120 us */
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# define MAX_PWM_VAL ((2120ul * F_CPU) / 16 / 1000000ul)
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#else
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# error "Don't know how to run on your MCU_TYPE."
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#endif
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PCMSK = (1 << 4);
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GIFR = (1 << PCIF);
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GIMSK = (1 << PCIE);
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DDRB = (1 << PB1);
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PORTB = 0;
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sei();
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}
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#if defined(__AVR_ATtiny25__) ||\
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defined(__AVR_ATtiny45__) ||\
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defined(__AVR_ATtiny85__)
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ISR(PCINT0_vect)
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{
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uint8_t tcnt1;
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if (PINB & (1 << 4))
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{
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/* Start timer 1 with a prescaler of 16. */
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TCNT1 = 0;
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TCCR1 = (1 << CS12) | (1 << CS10);
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return;
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}
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/* Stop timer 1, current value is pulse width. */
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tcnt1 = TCNT1;
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TCCR1 = 0;
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GIMSK &= ~(1 << PCIE);
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pwm_incoming = tcnt1;
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intbits.pwm_received = 1;
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}
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#endif /* ATtinyX5 */
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int
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main(void)
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{
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ioinit();
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for (;;)
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{
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if (intbits.pwm_received)
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{
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intbits.pwm_received = 0;
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#if defined(__AVR_ATtiny13__)
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if (pwm_incoming < MIN_PWM_VAL)
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pwm_incoming = MIN_PWM_VAL;
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else if (pwm_incoming > MAX_PWM_VAL)
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pwm_incoming = MAX_PWM_VAL;
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OCR0B = (pwm_incoming - MIN_PWM_VAL) * 255ul / (MAX_PWM_VAL - MIN_PWM_VAL);
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#else
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OCR0B = (pwm_incoming - MIN_PWM_VAL) * 255u / (MAX_PWM_VAL - MIN_PWM_VAL);
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#endif
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GIFR = (1 << PCIF);
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GIMSK |= (1 << PCIE);
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}
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sleep_mode();
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}
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}
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