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<!--
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This file documents the GNU Assembler "as".
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Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002,
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2006, 2007 Free Software Foundation, Inc.
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<a name="M68K_002dOpts"></a>Next: <a rel="next" accesskey="n" href="M68K_002dSyntax.html#M68K_002dSyntax">M68K-Syntax</a>,
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Up: <a rel="up" accesskey="u" href="M68K_002dDependent.html#M68K_002dDependent">M68K-Dependent</a>
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<h4 class="subsection">9.20.1 M680x0 Options</h4>
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<p><a name="index-options_002c-M680x0-1085"></a><a name="index-M680x0-options-1086"></a>The Motorola 680x0 version of <code>as</code> has a few machine
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dependent options:
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<a name="index-_0040samp_007b_002dmarch_003d_007d-command-line-option_002c-M680x0-1087"></a>
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<dl><dt><span class="samp">-march=</span><var>architecture</var><dd>This option specifies a target architecture.  The following
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architectures are recognized:
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<code>68000</code>,
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<code>68010</code>,
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<code>68020</code>,
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<code>68030</code>,
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<code>68040</code>,
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<code>68060</code>,
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<code>cpu32</code>,
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<code>isaa</code>,
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<code>isaaplus</code>,
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<code>isab</code>,
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<code>isac</code> and
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<code>cfv4e</code>.
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     <p><a name="index-_0040samp_007b_002dmcpu_003d_007d-command-line-option_002c-M680x0-1088"></a><br><dt><span class="samp">-mcpu=</span><var>cpu</var><dd>This option specifies a target cpu.  When used in conjunction with the
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<span class="option">-march</span> option, the cpu must be within the specified
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architecture.  Also, the generic features of the architecture are used
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for instruction generation, rather than those of the specific chip.
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     <p><a name="index-_0040samp_007b_002dm_005bno_002d_005d68851_007d-command-line-option_002c-M680x0-1089"></a><a name="index-_0040samp_007b_002dm_005bno_002d_005d68881_007d-command-line-option_002c-M680x0-1090"></a><a name="index-_0040samp_007b_002dm_005bno_002d_005ddiv_007d-command-line-option_002c-M680x0-1091"></a><a name="index-_0040samp_007b_002dm_005bno_002d_005dusp_007d-command-line-option_002c-M680x0-1092"></a><a name="index-_0040samp_007b_002dm_005bno_002d_005dfloat_007d-command-line-option_002c-M680x0-1093"></a><a name="index-_0040samp_007b_002dm_005bno_002d_005dmac_007d-command-line-option_002c-M680x0-1094"></a><a name="index-_0040samp_007b_002dm_005bno_002d_005demac_007d-command-line-option_002c-M680x0-1095"></a><br><dt><span class="samp">-m[no-]68851</span><br><dt><span class="samp">-m[no-]68881</span><br><dt><span class="samp">-m[no-]div</span><br><dt><span class="samp">-m[no-]usp</span><br><dt><span class="samp">-m[no-]float</span><br><dt><span class="samp">-m[no-]mac</span><br><dt><span class="samp">-m[no-]emac</span><dd>
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Enable or disable various architecture specific features.  If a chip
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or architecture by default supports an option (for instance
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<span class="option">-march=isaaplus</span> includes the <span class="option">-mdiv</span> option),
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explicitly disabling the option will override the default.
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     <p><a name="index-_0040samp_007b_002dl_007d-option_002c-M680x0-1096"></a><br><dt><span class="samp">-l</span><dd>You can use the <span class="samp">-l</span> option to shorten the size of references to undefined
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symbols.  If you do not use the <span class="samp">-l</span> option, references to undefined
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symbols are wide enough for a full <code>long</code> (32 bits).  (Since
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<code>as</code> cannot know where these symbols end up, <code>as</code> can
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only allocate space for the linker to fill in later.  Since <code>as</code>
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does not know how far away these symbols are, it allocates as much space as it
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can.)  If you use this option, the references are only one word wide (16 bits). 
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This may be useful if you want the object file to be as small as possible, and
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you know that the relevant symbols are always less than 17 bits away.
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     <p><a name="index-_0040samp_007b_002d_002dregister_002dprefix_002doptional_007d-option_002c-M680x0-1097"></a><br><dt><span class="samp">--register-prefix-optional</span><dd>For some configurations, especially those where the compiler normally
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does not prepend an underscore to the names of user variables, the
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assembler requires a <span class="samp">%</span> before any use of a register name.  This
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is intended to let the assembler distinguish between C variables and
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functions named <span class="samp">a0</span> through <span class="samp">a7</span>, and so on.  The <span class="samp">%</span> is
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always accepted, but is not required for certain configurations, notably
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<span class="samp">sun3</span>.  The <span class="samp">--register-prefix-optional</span> option may be used
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to permit omitting the <span class="samp">%</span> even for configurations for which it is
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normally required.  If this is done, it will generally be impossible to
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refer to C variables and functions with the same names as register
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names.
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     <p><a name="index-_0040samp_007b_002d_002dbitwise_002dor_007d-option_002c-M680x0-1098"></a><br><dt><span class="samp">--bitwise-or</span><dd>Normally the character <span class="samp">|</span> is treated as a comment character, which
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means that it can not be used in expressions.  The <span class="samp">--bitwise-or</span>
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option turns <span class="samp">|</span> into a normal character.  In this mode, you must
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either use C style comments, or start comments with a <span class="samp">#</span> character
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at the beginning of a line.
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     <p><a name="index-_0040samp_007b_002d_002dbase_002dsize_002ddefault_002d16_007d-1099"></a><a name="index-_0040samp_007b_002d_002dbase_002dsize_002ddefault_002d32_007d-1100"></a><br><dt><span class="samp">--base-size-default-16  --base-size-default-32</span><dd>If you use an addressing mode with a base register without specifying
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the size, <code>as</code> will normally use the full 32 bit value. 
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For example, the addressing mode <span class="samp">%a0@(%d0)</span> is equivalent to
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<span class="samp">%a0@(%d0:l)</span>.  You may use the <span class="samp">--base-size-default-16</span>
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option to tell <code>as</code> to default to using the 16 bit value. 
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In this case, <span class="samp">%a0@(%d0)</span> is equivalent to <span class="samp">%a0@(%d0:w)</span>. 
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You may use the <span class="samp">--base-size-default-32</span> option to restore the
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default behaviour.
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     <p><a name="index-_0040samp_007b_002d_002ddisp_002dsize_002ddefault_002d16_007d-1101"></a><a name="index-_0040samp_007b_002d_002ddisp_002dsize_002ddefault_002d32_007d-1102"></a><br><dt><span class="samp">--disp-size-default-16  --disp-size-default-32</span><dd>If you use an addressing mode with a displacement, and the value of the
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displacement is not known, <code>as</code> will normally assume that
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the value is 32 bits.  For example, if the symbol <span class="samp">disp</span> has not
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been defined, <code>as</code> will assemble the addressing mode
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<span class="samp">%a0@(disp,%d0)</span> as though <span class="samp">disp</span> is a 32 bit value.  You may
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use the <span class="samp">--disp-size-default-16</span> option to tell <code>as</code>
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to instead assume that the displacement is 16 bits.  In this case,
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<code>as</code> will assemble <span class="samp">%a0@(disp,%d0)</span> as though
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<span class="samp">disp</span> is a 16 bit value.  You may use the
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<span class="samp">--disp-size-default-32</span> option to restore the default behaviour.
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     <p><a name="index-_0040samp_007b_002d_002dpcrel_007d-1103"></a><br><dt><span class="samp">--pcrel</span><dd>Always keep branches PC-relative.  In the M680x0 architecture all branches
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are defined as PC-relative.  However, on some processors they are limited
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to word displacements maximum.  When <code>as</code> needs a long branch
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that is not available, it normally emits an absolute jump instead.  This
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option disables this substitution.  When this option is given and no long
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branches are available, only word branches will be emitted.  An error
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message will be generated if a word branch cannot reach its target.  This
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option has no effect on 68020 and other processors that have long branches. 
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see <a href="M68K_002dBranch.html#M68K_002dBranch">Branch Improvement</a>.
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     <p><a name="index-_0040samp_007b_002dm68000_007d-and-related-options-1104"></a><a name="index-architecture-options_002c-M680x0-1105"></a><a name="index-M680x0-architecture-options-1106"></a><br><dt><span class="samp">-m68000</span><dd><code>as</code> can assemble code for several different members of the
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Motorola 680x0 family.  The default depends upon how <code>as</code>
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was configured when it was built; normally, the default is to assemble
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code for the 68020 microprocessor.  The following options may be used to
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change the default.  These options control which instructions and
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addressing modes are permitted.  The members of the 680x0 family are
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very similar.  For detailed information about the differences, see the
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Motorola manuals.
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          <dl>
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<dt><span class="samp">-m68000</span><dt><span class="samp">-m68ec000</span><dt><span class="samp">-m68hc000</span><dt><span class="samp">-m68hc001</span><dt><span class="samp">-m68008</span><dt><span class="samp">-m68302</span><dt><span class="samp">-m68306</span><dt><span class="samp">-m68307</span><dt><span class="samp">-m68322</span><dt><span class="samp">-m68356</span><dd>Assemble for the 68000. <span class="samp">-m68008</span>, <span class="samp">-m68302</span>, and so on are synonyms
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for <span class="samp">-m68000</span>, since the chips are the same from the point of view
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of the assembler.
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          <br><dt><span class="samp">-m68010</span><dd>Assemble for the 68010.
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          <br><dt><span class="samp">-m68020</span><dt><span class="samp">-m68ec020</span><dd>Assemble for the 68020.  This is normally the default.
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          <br><dt><span class="samp">-m68030</span><dt><span class="samp">-m68ec030</span><dd>Assemble for the 68030.
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          <br><dt><span class="samp">-m68040</span><dt><span class="samp">-m68ec040</span><dd>Assemble for the 68040.
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          <br><dt><span class="samp">-m68060</span><dt><span class="samp">-m68ec060</span><dd>Assemble for the 68060.
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          <br><dt><span class="samp">-mcpu32</span><dt><span class="samp">-m68330</span><dt><span class="samp">-m68331</span><dt><span class="samp">-m68332</span><dt><span class="samp">-m68333</span><dt><span class="samp">-m68334</span><dt><span class="samp">-m68336</span><dt><span class="samp">-m68340</span><dt><span class="samp">-m68341</span><dt><span class="samp">-m68349</span><dt><span class="samp">-m68360</span><dd>Assemble for the CPU32 family of chips.
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          <br><dt><span class="samp">-m5200</span><br><dt><span class="samp">-m5202</span><br><dt><span class="samp">-m5204</span><br><dt><span class="samp">-m5206</span><br><dt><span class="samp">-m5206e</span><br><dt><span class="samp">-m521x</span><br><dt><span class="samp">-m5249</span><br><dt><span class="samp">-m528x</span><br><dt><span class="samp">-m5307</span><br><dt><span class="samp">-m5407</span><br><dt><span class="samp">-m547x</span><br><dt><span class="samp">-m548x</span><br><dt><span class="samp">-mcfv4</span><br><dt><span class="samp">-mcfv4e</span><dd>Assemble for the ColdFire family of chips.
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          <br><dt><span class="samp">-m68881</span><dt><span class="samp">-m68882</span><dd>Assemble 68881 floating point instructions.  This is the default for the
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68020, 68030, and the CPU32.  The 68040 and 68060 always support
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floating point instructions.
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          <br><dt><span class="samp">-mno-68881</span><dd>Do not assemble 68881 floating point instructions.  This is the default
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for 68000 and the 68010.  The 68040 and 68060 always support floating
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point instructions, even if this option is used.
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          <br><dt><span class="samp">-m68851</span><dd>Assemble 68851 MMU instructions.  This is the default for the 68020,
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68030, and 68060.  The 68040 accepts a somewhat different set of MMU
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instructions; <span class="samp">-m68851</span> and <span class="samp">-m68040</span> should not be used
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together.
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          <br><dt><span class="samp">-mno-68851</span><dd>Do not assemble 68851 MMU instructions.  This is the default for the
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68000, 68010, and the CPU32.  The 68040 accepts a somewhat different set
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of MMU instructions. 
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</dl>
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