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69 lines
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69 lines
3.1 KiB
HTML
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<title>SH Floating Point - Using as</title>
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<!--
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This file documents the GNU Assembler "as".
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Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002,
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2006, 2007 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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<body>
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<div class="node">
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<p>
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<a name="SH-Floating-Point"></a>Next: <a rel="next" accesskey="n" href="SH-Directives.html#SH-Directives">SH Directives</a>,
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Previous: <a rel="previous" accesskey="p" href="SH-Syntax.html#SH-Syntax">SH Syntax</a>,
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Up: <a rel="up" accesskey="u" href="SH_002dDependent.html#SH_002dDependent">SH-Dependent</a>
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<hr><br>
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<h4 class="subsection">9.28.3 Floating Point</h4>
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<p><a name="index-floating-point_002c-SH-_0028_0040sc_007bieee_007d_0029-1457"></a><a name="index-SH-floating-point-_0028_0040sc_007bieee_007d_0029-1458"></a>SH2E, SH3E and SH4 groups have on-chip floating-point unit (FPU). Other
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SH groups can use <code>.float</code> directive to generate <span class="sc">ieee</span>
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floating-point numbers.
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<p>SH2E and SH3E support single-precision floating point calculations as
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well as entirely PCAPI compatible emulation of double-precision
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floating point calculations. SH2E and SH3E instructions are a subset of
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the floating point calculations conforming to the IEEE754 standard.
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<p>In addition to single-precision and double-precision floating-point
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operation capability, the on-chip FPU of SH4 has a 128-bit graphic
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engine that enables 32-bit floating-point data to be processed 128
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bits at a time. It also supports 4 * 4 array operations and inner
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product operations. Also, a superscalar architecture is employed that
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enables simultaneous execution of two instructions (including FPU
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instructions), providing performance of up to twice that of
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conventional architectures at the same frequency.
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</body></html>
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