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<title>i386-Options - Using as</title>
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<!--
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This file documents the GNU Assembler "as".
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Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002,
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2006, 2007 Free Software Foundation, Inc.
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<a name="i386_002dOptions"></a>Next: <a rel="next" accesskey="n" href="i386_002dDirectives.html#i386_002dDirectives">i386-Directives</a>,
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Up: <a rel="up" accesskey="u" href="i386_002dDependent.html#i386_002dDependent">i386-Dependent</a>
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<hr><br>
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<h4 class="subsection">9.13.1 Options</h4>
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<p><a name="index-options-for-i386-817"></a><a name="index-options-for-x86_002d64-818"></a><a name="index-i386-options-819"></a><a name="index-x86_002d64-options-820"></a>
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The i386 version of <code>as</code> has a few machine
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dependent options:
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<a name="index-_0040samp_007b_002d_002d32_007d-option_002c-i386-821"></a>
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<a name="index-_0040samp_007b_002d_002d32_007d-option_002c-x86_002d64-822"></a>
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<a name="index-_0040samp_007b_002d_002d64_007d-option_002c-i386-823"></a>
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<a name="index-_0040samp_007b_002d_002d64_007d-option_002c-x86_002d64-824"></a>
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<dl><dt><code>--32 | --64</code><dd>Select the word size, either 32 bits or 64 bits. Selecting 32-bit
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implies Intel i386 architecture, while 64-bit implies AMD x86-64
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architecture.
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<p>These options are only available with the ELF object file format, and
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require that the necessary BFD support has been included (on a 32-bit
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platform you have to add –enable-64-bit-bfd to configure enable 64-bit
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usage and use x86-64 as target platform).
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<br><dt><code>-n</code><dd>By default, x86 GAS replaces multiple nop instructions used for
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alignment within code sections with multi-byte nop instructions such
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as leal 0(%esi,1),%esi. This switch disables the optimization.
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<p><a name="index-_0040samp_007b_002d_002ddivide_007d-option_002c-i386-825"></a><br><dt><code>--divide</code><dd>On SVR4-derived platforms, the character <span class="samp">/</span> is treated as a comment
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character, which means that it cannot be used in expressions. The
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<span class="samp">--divide</span> option turns <span class="samp">/</span> into a normal character. This does
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not disable <span class="samp">/</span> at the beginning of a line starting a comment, or
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affect using <span class="samp">#</span> for starting a comment.
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<p><a name="index-_0040samp_007b_002dmarch_003d_007d-option_002c-i386-826"></a><a name="index-_0040samp_007b_002dmarch_003d_007d-option_002c-x86_002d64-827"></a><br><dt><code>-march=</code><var>CPU</var><code>[+</code><var>EXTENSION</var><code>...]</code><dd>This option specifies the target processor. The assembler will
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issue an error message if an attempt is made to assemble an instruction
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which will not execute on the target processor. The following
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processor names are recognized:
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<code>i8086</code>,
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<code>i186</code>,
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<code>i286</code>,
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<code>i386</code>,
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<code>i486</code>,
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<code>i586</code>,
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<code>i686</code>,
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<code>pentium</code>,
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<code>pentiumpro</code>,
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<code>pentiumii</code>,
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<code>pentiumiii</code>,
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<code>pentium4</code>,
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<code>prescott</code>,
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<code>nocona</code>,
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<code>core</code>,
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<code>core2</code>,
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<code>k6</code>,
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<code>k6_2</code>,
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<code>athlon</code>,
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<code>opteron</code>,
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<code>k8</code>,
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<code>amdfam10</code>,
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<code>generic32</code> and
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<code>generic64</code>.
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<p>In addition to the basic instruction set, the assembler can be told to
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accept various extension mnemonics. For example,
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<code>-march=i686+sse4+vmx</code> extends <var>i686</var> with <var>sse4</var> and
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<var>vmx</var>. The following extensions are currently supported:
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<code>mmx</code>,
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<code>sse</code>,
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<code>sse2</code>,
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<code>sse3</code>,
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<code>ssse3</code>,
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<code>sse4.1</code>,
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<code>sse4.2</code>,
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<code>sse4</code>,
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<code>avx</code>,
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<code>vmx</code>,
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<code>smx</code>,
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<code>xsave</code>,
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<code>aes</code>,
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<code>pclmul</code>,
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<code>fma</code>,
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<code>movbe</code>,
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<code>ept</code>,
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<code>3dnow</code>,
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<code>3dnowa</code>,
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<code>sse4a</code>,
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<code>sse5</code>,
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<code>svme</code>,
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<code>abm</code> and
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<code>padlock</code>.
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<p>When the <code>.arch</code> directive is used with <span class="option">-march</span>, the
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<code>.arch</code> directive will take precedent.
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<p><a name="index-_0040samp_007b_002dmtune_003d_007d-option_002c-i386-828"></a><a name="index-_0040samp_007b_002dmtune_003d_007d-option_002c-x86_002d64-829"></a><br><dt><code>-mtune=</code><var>CPU</var><dd>This option specifies a processor to optimize for. When used in
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conjunction with the <span class="option">-march</span> option, only instructions
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of the processor specified by the <span class="option">-march</span> option will be
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generated.
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<p>Valid <var>CPU</var> values are identical to the processor list of
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<span class="option">-march=</span><var>CPU</var>.
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<p><a name="index-_0040samp_007b_002dmsse2avx_007d-option_002c-i386-830"></a><a name="index-_0040samp_007b_002dmsse2avx_007d-option_002c-x86_002d64-831"></a><br><dt><code>-msse2avx</code><dd>This option specifies that the assembler should encode SSE instructions
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with VEX prefix.
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<p><a name="index-_0040samp_007b_002dmsse_002dcheck_003d_007d-option_002c-i386-832"></a><a name="index-_0040samp_007b_002dmsse_002dcheck_003d_007d-option_002c-x86_002d64-833"></a><br><dt><code>-msse-check=</code><var>none</var><br><dt><code>-msse-check=</code><var>warning</var><br><dt><code>-msse-check=</code><var>error</var><dd>These options control if the assembler should check SSE intructions.
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<span class="option">-msse-check=</span><var>none</var> will make the assembler not to check SSE
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instructions, which is the default. <span class="option">-msse-check=</span><var>warning</var>
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will make the assembler issue a warning for any SSE intruction.
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<span class="option">-msse-check=</span><var>error</var> will make the assembler issue an error
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for any SSE intruction.
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<p><a name="index-_0040samp_007b_002dmmnemonic_003d_007d-option_002c-i386-834"></a><a name="index-_0040samp_007b_002dmmnemonic_003d_007d-option_002c-x86_002d64-835"></a><br><dt><code>-mmnemonic=</code><var>att</var><br><dt><code>-mmnemonic=</code><var>intel</var><dd>This option specifies instruction mnemonic for matching instructions.
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The <code>.att_mnemonic</code> and <code>.intel_mnemonic</code> directives will
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take precedent.
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<p><a name="index-_0040samp_007b_002dmsyntax_003d_007d-option_002c-i386-836"></a><a name="index-_0040samp_007b_002dmsyntax_003d_007d-option_002c-x86_002d64-837"></a><br><dt><code>-msyntax=</code><var>att</var><br><dt><code>-msyntax=</code><var>intel</var><dd>This option specifies instruction syntax when processing instructions.
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The <code>.att_syntax</code> and <code>.intel_syntax</code> directives will
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take precedent.
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<p><a name="index-_0040samp_007b_002dmnaked_002dreg_007d-option_002c-i386-838"></a><a name="index-_0040samp_007b_002dmnaked_002dreg_007d-option_002c-x86_002d64-839"></a><br><dt><code>-mnaked-reg</code><dd>This opetion specifies that registers don't require a <span class="samp">%</span> prefix.
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The <code>.att_syntax</code> and <code>.intel_syntax</code> directives will take precedent.
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</dl>
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