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114 lines
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<title>Xtensa Immediate Relaxation - Using as</title>
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<p>
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<a name="Xtensa-Immediate-Relaxation"></a>Previous: <a rel="previous" accesskey="p" href="Xtensa-Call-Relaxation.html#Xtensa-Call-Relaxation">Xtensa Call Relaxation</a>,
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Up: <a rel="up" accesskey="u" href="Xtensa-Relaxation.html#Xtensa-Relaxation">Xtensa Relaxation</a>
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<h5 class="subsubsection">9.36.4.3 Other Immediate Field Relaxation</h5>
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<p><a name="index-immediate-fields_002c-relaxation-1868"></a><a name="index-relaxation-of-immediate-fields-1869"></a>
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The assembler normally performs the following other relaxations. They
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can be disabled by using underscore prefixes (see <a href="Xtensa-Opcodes.html#Xtensa-Opcodes">Opcode Names</a>), the <span class="samp">--no-transform</span> command-line option
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(see <a href="Xtensa-Options.html#Xtensa-Options">Command Line Options</a>), or the
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<code>no-transform</code> directive (see <a href="Transform-Directive.html#Transform-Directive">transform</a>).
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<p><a name="index-_0040code_007bMOVI_007d-instructions_002c-relaxation-1870"></a><a name="index-relaxation-of-_0040code_007bMOVI_007d-instructions-1871"></a>The <code>MOVI</code> machine instruction can only materialize values in the
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range from -2048 to 2047. Values outside this range are best
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materialized with <code>L32R</code> instructions. Thus:
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<pre class="smallexample"> movi a0, 100000
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</pre>
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<p>is assembled into the following machine code:
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<pre class="smallexample"> .literal .L1, 100000
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l32r a0, .L1
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</pre>
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<p><a name="index-_0040code_007bL8UI_007d-instructions_002c-relaxation-1872"></a><a name="index-_0040code_007bL16SI_007d-instructions_002c-relaxation-1873"></a><a name="index-_0040code_007bL16UI_007d-instructions_002c-relaxation-1874"></a><a name="index-_0040code_007bL32I_007d-instructions_002c-relaxation-1875"></a><a name="index-relaxation-of-_0040code_007bL8UI_007d-instructions-1876"></a><a name="index-relaxation-of-_0040code_007bL16SI_007d-instructions-1877"></a><a name="index-relaxation-of-_0040code_007bL16UI_007d-instructions-1878"></a><a name="index-relaxation-of-_0040code_007bL32I_007d-instructions-1879"></a>The <code>L8UI</code> machine instruction can only be used with immediate
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offsets in the range from 0 to 255. The <code>L16SI</code> and <code>L16UI</code>
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machine instructions can only be used with offsets from 0 to 510. The
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<code>L32I</code> machine instruction can only be used with offsets from 0 to
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1020. A load offset outside these ranges can be materialized with
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an <code>L32R</code> instruction if the destination register of the load
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is different than the source address register. For example:
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<pre class="smallexample"> l32i a1, a0, 2040
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</pre>
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<p>is translated to:
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<pre class="smallexample"> .literal .L1, 2040
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l32r a1, .L1
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add a1, a0, a1
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l32i a1, a1, 0
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</pre>
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<p class="noindent">If the load destination and source address register are the same, an
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out-of-range offset causes an error.
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<p><a name="index-_0040code_007bADDI_007d-instructions_002c-relaxation-1880"></a><a name="index-relaxation-of-_0040code_007bADDI_007d-instructions-1881"></a>The Xtensa <code>ADDI</code> instruction only allows immediate operands in the
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range from -128 to 127. There are a number of alternate instruction
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sequences for the <code>ADDI</code> operation. First, if the
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immediate is 0, the <code>ADDI</code> will be turned into a <code>MOV.N</code>
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instruction (or the equivalent <code>OR</code> instruction if the code density
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option is not available). If the <code>ADDI</code> immediate is outside of
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the range -128 to 127, but inside the range -32896 to 32639, an
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<code>ADDMI</code> instruction or <code>ADDMI</code>/<code>ADDI</code> sequence will be
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used. Finally, if the immediate is outside of this range and a free
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register is available, an <code>L32R</code>/<code>ADD</code> sequence will be used
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with a literal allocated from the literal pool.
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<p>For example:
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<pre class="smallexample"> addi a5, a6, 0
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addi a5, a6, 512
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addi a5, a6, 513
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addi a5, a6, 50000
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</pre>
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<p>is assembled into the following:
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<pre class="smallexample"> .literal .L1, 50000
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mov.n a5, a6
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addmi a5, a6, 0x200
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addmi a5, a6, 0x200
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addi a5, a5, 1
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l32r a5, .L1
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add a5, a6, a5
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</pre>
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