100 lines
4.7 KiB
HTML
100 lines
4.7 KiB
HTML
<html lang="en">
|
|
<head>
|
|
<title>ARM Opcodes - Using as</title>
|
|
<meta http-equiv="Content-Type" content="text/html">
|
|
<meta name="description" content="Using as">
|
|
<meta name="generator" content="makeinfo 4.7">
|
|
<link title="Top" rel="start" href="index.html#Top">
|
|
<link rel="up" href="ARM_002dDependent.html#ARM_002dDependent" title="ARM-Dependent">
|
|
<link rel="prev" href="ARM-Directives.html#ARM-Directives" title="ARM Directives">
|
|
<link rel="next" href="ARM-Mapping-Symbols.html#ARM-Mapping-Symbols" title="ARM Mapping Symbols">
|
|
<link href="http://www.gnu.org/software/texinfo/" rel="generator-home" title="Texinfo Homepage">
|
|
<!--
|
|
This file documents the GNU Assembler "as".
|
|
|
|
Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002,
|
|
2006, 2007 Free Software Foundation, Inc.
|
|
|
|
Permission is granted to copy, distribute and/or modify this document
|
|
under the terms of the GNU Free Documentation License, Version 1.1
|
|
or any later version published by the Free Software Foundation;
|
|
with no Invariant Sections, with no Front-Cover Texts, and with no
|
|
Back-Cover Texts. A copy of the license is included in the
|
|
section entitled ``GNU Free Documentation License''.
|
|
|
|
man end-->
|
|
<meta http-equiv="Content-Style-Type" content="text/css">
|
|
<style type="text/css"><!--
|
|
pre.display { font-family:inherit }
|
|
pre.format { font-family:inherit }
|
|
pre.smalldisplay { font-family:inherit; font-size:smaller }
|
|
pre.smallformat { font-family:inherit; font-size:smaller }
|
|
pre.smallexample { font-size:smaller }
|
|
pre.smalllisp { font-size:smaller }
|
|
span.sc { font-variant:small-caps }
|
|
span.roman { font-family: serif; font-weight: normal; }
|
|
--></style>
|
|
</head>
|
|
<body>
|
|
<div class="node">
|
|
<p>
|
|
<a name="ARM-Opcodes"></a>Next: <a rel="next" accesskey="n" href="ARM-Mapping-Symbols.html#ARM-Mapping-Symbols">ARM Mapping Symbols</a>,
|
|
Previous: <a rel="previous" accesskey="p" href="ARM-Directives.html#ARM-Directives">ARM Directives</a>,
|
|
Up: <a rel="up" accesskey="u" href="ARM_002dDependent.html#ARM_002dDependent">ARM-Dependent</a>
|
|
<hr><br>
|
|
</div>
|
|
|
|
<h4 class="subsection">9.3.5 Opcodes</h4>
|
|
|
|
<p><a name="index-ARM-opcodes-631"></a><a name="index-opcodes-for-ARM-632"></a><code>as</code> implements all the standard ARM opcodes. It also
|
|
implements several pseudo opcodes, including several synthetic load
|
|
instructions.
|
|
|
|
|
|
<a name="index-_0040code_007bNOP_007d-pseudo-op_002c-ARM-633"></a>
|
|
<dl><dt><code>NOP</code><dd>
|
|
<pre class="smallexample"> nop
|
|
</pre>
|
|
<p>This pseudo op will always evaluate to a legal ARM instruction that does
|
|
nothing. Currently it will evaluate to MOV r0, r0.
|
|
|
|
<p><a name="index-_0040code_007bLDR-reg_002c_003d_003clabel_003e_007d-pseudo-op_002c-ARM-634"></a><br><dt><code>LDR</code><dd>
|
|
<pre class="smallexample"> ldr <register> , = <expression>
|
|
</pre>
|
|
<p>If expression evaluates to a numeric constant then a MOV or MVN
|
|
instruction will be used in place of the LDR instruction, if the
|
|
constant can be generated by either of these instructions. Otherwise
|
|
the constant will be placed into the nearest literal pool (if it not
|
|
already there) and a PC relative LDR instruction will be generated.
|
|
|
|
<p><a name="index-_0040code_007bADR-reg_002c_003clabel_003e_007d-pseudo-op_002c-ARM-635"></a><br><dt><code>ADR</code><dd>
|
|
<pre class="smallexample"> adr <register> <label>
|
|
</pre>
|
|
<p>This instruction will load the address of <var>label</var> into the indicated
|
|
register. The instruction will evaluate to a PC relative ADD or SUB
|
|
instruction depending upon where the label is located. If the label is
|
|
out of range, or if it is not defined in the same file (and section) as
|
|
the ADR instruction, then an error will be generated. This instruction
|
|
will not make use of the literal pool.
|
|
|
|
<p><a name="index-_0040code_007bADRL-reg_002c_003clabel_003e_007d-pseudo-op_002c-ARM-636"></a><br><dt><code>ADRL</code><dd>
|
|
<pre class="smallexample"> adrl <register> <label>
|
|
</pre>
|
|
<p>This instruction will load the address of <var>label</var> into the indicated
|
|
register. The instruction will evaluate to one or two PC relative ADD
|
|
or SUB instructions depending upon where the label is located. If a
|
|
second instruction is not needed a NOP instruction will be generated in
|
|
its place, so that this instruction is always 8 bytes long.
|
|
|
|
<p>If the label is out of range, or if it is not defined in the same file
|
|
(and section) as the ADRL instruction, then an error will be generated.
|
|
This instruction will not make use of the literal pool.
|
|
|
|
</dl>
|
|
|
|
<p>For information on the ARM or Thumb instruction sets, see <cite>ARM
|
|
Software Development Toolkit Reference Manual</cite>, Advanced RISC Machines
|
|
Ltd.
|
|
|
|
</body></html>
|
|
|