103 lines
4.9 KiB
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103 lines
4.9 KiB
HTML
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<title>M68HC11-Branch - Using as</title>
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<link rel="up" href="M68HC11_002dopcodes.html#M68HC11_002dopcodes" title="M68HC11-opcodes">
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<!--
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This file documents the GNU Assembler "as".
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Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002,
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2006, 2007 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 1.1
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or any later version published by the Free Software Foundation;
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with no Invariant Sections, with no Front-Cover Texts, and with no
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Back-Cover Texts. A copy of the license is included in the
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<p>
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<a name="M68HC11_002dBranch"></a>Up: <a rel="up" accesskey="u" href="M68HC11_002dopcodes.html#M68HC11_002dopcodes">M68HC11-opcodes</a>
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<hr><br>
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</div>
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<h5 class="subsubsection">9.21.6.1 Branch Improvement</h5>
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<p><a name="index-pseudo_002dopcodes_002c-M68HC11-1189"></a><a name="index-M68HC11-pseudo_002dopcodes-1190"></a><a name="index-branch-improvement_002c-M68HC11-1191"></a><a name="index-M68HC11-branch-improvement-1192"></a>
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Certain pseudo opcodes are permitted for branch instructions.
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They expand to the shortest branch instruction that reach the
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target. Generally these mnemonics are made by prepending <span class="samp">j</span> to
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the start of Motorola mnemonic. These pseudo opcodes are not affected
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by the <span class="samp">--short-branches</span> or <span class="samp">--force-long-branches</span> options.
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<p>The following table summarizes the pseudo-operations.
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<pre class="smallexample"> Displacement Width
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+-------------------------------------------------------------+
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| Options |
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| --short-branches --force-long-branches |
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+--------------------------+----------------------------------+
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Op |BYTE WORD | BYTE WORD |
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+--------------------------+----------------------------------+
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bsr | bsr <pc-rel> <error> | jsr <abs> |
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bra | bra <pc-rel> <error> | jmp <abs> |
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jbsr | bsr <pc-rel> jsr <abs> | bsr <pc-rel> jsr <abs> |
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jbra | bra <pc-rel> jmp <abs> | bra <pc-rel> jmp <abs> |
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bXX | bXX <pc-rel> <error> | bNX +3; jmp <abs> |
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jbXX | bXX <pc-rel> bNX +3; | bXX <pc-rel> bNX +3; jmp <abs> |
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| jmp <abs> | |
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+--------------------------+----------------------------------+
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XX: condition
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NX: negative of condition XX
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</pre>
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<dl>
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<dt><code>jbsr</code><dt><code>jbra</code><dd>These are the simplest jump pseudo-operations; they always map to one
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particular machine instruction, depending on the displacement to the
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branch target.
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<br><dt><code>jb</code><var>XX</var><dd>Here, <span class="samp">jb</span><var>XX</var> stands for an entire family of pseudo-operations,
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where <var>XX</var> is a conditional branch or condition-code test. The full
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list of pseudo-ops in this family is:
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<pre class="smallexample"> jbcc jbeq jbge jbgt jbhi jbvs jbpl jblo
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jbcs jbne jblt jble jbls jbvc jbmi
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</pre>
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<p>For the cases of non-PC relative displacements and long displacements,
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<code>as</code> issues a longer code fragment in terms of
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<var>NX</var>, the opposite condition to <var>XX</var>. For example, for the
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non-PC relative case:
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<pre class="smallexample"> jb<var>XX</var> foo
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</pre>
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<p>gives
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<pre class="smallexample"> b<var>NX</var>s oof
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jmp foo
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oof:
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</pre>
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</dl>
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<!-- Copyright 1991, 1992, 1993, 1994, 1995, 1997, 1999, 2000, 2001, -->
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<!-- 2002, 2003, 2004 -->
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<!-- Free Software Foundation, Inc. -->
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