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430 lines
14 KiB
Groff
430 lines
14 KiB
Groff
.TH "boot.h" 3 "4 Dec 2008" "Version 1.6.4" "avr-libc" \" -*- nroff -*-
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.ad l
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.nh
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.SH NAME
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boot.h \-
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.SH "Detailed Description"
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.PP
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.SH SYNOPSIS
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.br
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.PP
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.SS "Defines"
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.in +1c
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.ti -1c
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.RI "#define \fB_AVR_BOOT_H_\fP 1"
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.br
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.ti -1c
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.RI "#define \fBBOOTLOADER_SECTION\fP __attribute__ ((section ('.bootloader')))"
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.br
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.ti -1c
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.RI "#define \fB__COMMON_ASB\fP RWWSB"
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.br
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.ti -1c
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.RI "#define \fB__COMMON_ASRE\fP RWWSRE"
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.br
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.ti -1c
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.RI "#define \fBBLB12\fP 5"
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.br
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.ti -1c
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.RI "#define \fBBLB11\fP 4"
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.br
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.ti -1c
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.RI "#define \fBBLB02\fP 3"
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.br
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.ti -1c
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.RI "#define \fBBLB01\fP 2"
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.br
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.ti -1c
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.RI "#define \fBboot_spm_interrupt_enable\fP() (__SPM_REG |= (\fBuint8_t\fP)_BV(SPMIE))"
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.br
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.ti -1c
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.RI "#define \fBboot_spm_interrupt_disable\fP() (__SPM_REG &= (\fBuint8_t\fP)~_BV(SPMIE))"
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.br
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.ti -1c
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.RI "#define \fBboot_is_spm_interrupt\fP() (__SPM_REG & (\fBuint8_t\fP)_BV(SPMIE))"
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.br
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.ti -1c
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.RI "#define \fBboot_rww_busy\fP() (__SPM_REG & (\fBuint8_t\fP)_BV(__COMMON_ASB))"
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.br
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.ti -1c
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.RI "#define \fBboot_spm_busy\fP() (__SPM_REG & (\fBuint8_t\fP)_BV(__SPM_ENABLE))"
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.br
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.ti -1c
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.RI "#define \fBboot_spm_busy_wait\fP() do{}while(boot_spm_busy())"
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.br
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.ti -1c
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.RI "#define \fB__BOOT_PAGE_ERASE\fP (_BV(__SPM_ENABLE) | _BV(PGERS))"
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.br
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.ti -1c
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.RI "#define \fB__BOOT_PAGE_WRITE\fP (_BV(__SPM_ENABLE) | _BV(PGWRT))"
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.br
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.ti -1c
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.RI "#define \fB__BOOT_PAGE_FILL\fP _BV(__SPM_ENABLE)"
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.br
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.ti -1c
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.RI "#define \fB__BOOT_RWW_ENABLE\fP (_BV(__SPM_ENABLE) | _BV(__COMMON_ASRE))"
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.br
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.ti -1c
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.RI "#define \fB__BOOT_LOCK_BITS_SET\fP (_BV(__SPM_ENABLE) | _BV(BLBSET))"
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.br
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.ti -1c
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.RI "#define \fB__boot_page_fill_normal\fP(address, data)"
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.br
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.ti -1c
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.RI "#define \fB__boot_page_fill_alternate\fP(address, data)"
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.br
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.ti -1c
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.RI "#define \fB__boot_page_fill_extended\fP(address, data)"
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.br
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.ti -1c
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.RI "#define \fB__boot_page_erase_normal\fP(address)"
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.br
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.ti -1c
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.RI "#define \fB__boot_page_erase_alternate\fP(address)"
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.br
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.ti -1c
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.RI "#define \fB__boot_page_erase_extended\fP(address)"
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.br
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.ti -1c
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.RI "#define \fB__boot_page_write_normal\fP(address)"
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.br
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.ti -1c
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.RI "#define \fB__boot_page_write_alternate\fP(address)"
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.br
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.ti -1c
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.RI "#define \fB__boot_page_write_extended\fP(address)"
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.br
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.ti -1c
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.RI "#define \fB__boot_rww_enable\fP()"
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.br
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.ti -1c
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.RI "#define \fB__boot_rww_enable_alternate\fP()"
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.br
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.ti -1c
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.RI "#define \fB__boot_lock_bits_set\fP(lock_bits)"
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.br
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.ti -1c
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.RI "#define \fB__boot_lock_bits_set_alternate\fP(lock_bits)"
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.br
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.ti -1c
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.RI "#define \fBGET_LOW_FUSE_BITS\fP (0x0000)"
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.br
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.ti -1c
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.RI "#define \fBGET_LOCK_BITS\fP (0x0001)"
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.br
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.ti -1c
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.RI "#define \fBGET_EXTENDED_FUSE_BITS\fP (0x0002)"
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.br
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.ti -1c
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.RI "#define \fBGET_HIGH_FUSE_BITS\fP (0x0003)"
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.br
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.ti -1c
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.RI "#define \fBboot_lock_fuse_bits_get\fP(address)"
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.br
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.ti -1c
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.RI "#define \fB__BOOT_SIGROW_READ\fP (_BV(__SPM_ENABLE) | _BV(SIGRD))"
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.br
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.ti -1c
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.RI "#define \fBboot_signature_byte_get\fP(addr)"
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.br
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.ti -1c
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.RI "#define \fBboot_page_fill\fP(address, data) __boot_page_fill_normal(address, data)"
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.br
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.ti -1c
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.RI "#define \fBboot_page_erase\fP(address) __boot_page_erase_normal(address)"
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.br
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.ti -1c
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.RI "#define \fBboot_page_write\fP(address) __boot_page_write_normal(address)"
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.br
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.ti -1c
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.RI "#define \fBboot_rww_enable\fP() __boot_rww_enable()"
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.br
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.ti -1c
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.RI "#define \fBboot_lock_bits_set\fP(lock_bits) __boot_lock_bits_set(lock_bits)"
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.br
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.ti -1c
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.RI "#define \fBboot_page_fill_safe\fP(address, data)"
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.br
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.ti -1c
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.RI "#define \fBboot_page_erase_safe\fP(address)"
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.br
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.ti -1c
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.RI "#define \fBboot_page_write_safe\fP(address)"
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.br
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.ti -1c
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.RI "#define \fBboot_rww_enable_safe\fP()"
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.br
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.ti -1c
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.RI "#define \fBboot_lock_bits_set_safe\fP(lock_bits)"
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.br
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.in -1c
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.SH "Define Documentation"
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.PP
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.SS "#define __boot_lock_bits_set(lock_bits)"
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.PP
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\fBValue:\fP
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.PP
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.nf
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(__extension__({ \
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uint8_t value = (uint8_t)(~(lock_bits)); \
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__asm__ __volatile__ \
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( \
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'ldi r30, 1\n\t' \
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'ldi r31, 0\n\t' \
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'mov r0, %2\n\t' \
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'sts %0, %1\n\t' \
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'spm\n\t' \
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: \
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: 'i' (_SFR_MEM_ADDR(__SPM_REG)), \
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'r' ((uint8_t)__BOOT_LOCK_BITS_SET), \
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'r' (value) \
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: 'r0', 'r30', 'r31' \
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); \
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}))
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.fi
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.SS "#define __boot_lock_bits_set_alternate(lock_bits)"
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.PP
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\fBValue:\fP
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.PP
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.nf
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(__extension__({ \
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uint8_t value = (uint8_t)(~(lock_bits)); \
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__asm__ __volatile__ \
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( \
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'ldi r30, 1\n\t' \
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'ldi r31, 0\n\t' \
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'mov r0, %2\n\t' \
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'sts %0, %1\n\t' \
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'spm\n\t' \
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'.word 0xffff\n\t' \
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'nop\n\t' \
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: \
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: 'i' (_SFR_MEM_ADDR(__SPM_REG)), \
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'r' ((uint8_t)__BOOT_LOCK_BITS_SET), \
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'r' (value) \
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: 'r0', 'r30', 'r31' \
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); \
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}))
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.fi
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.SS "#define __boot_page_erase_alternate(address)"
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.PP
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\fBValue:\fP
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.PP
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.nf
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(__extension__({ \
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__asm__ __volatile__ \
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( \
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'sts %0, %1\n\t' \
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'spm\n\t' \
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'.word 0xffff\n\t' \
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'nop\n\t' \
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: \
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: 'i' (_SFR_MEM_ADDR(__SPM_REG)), \
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'r' ((uint8_t)__BOOT_PAGE_ERASE), \
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'z' ((uint16_t)address) \
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); \
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}))
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.fi
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.SS "#define __boot_page_erase_extended(address)"
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.PP
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\fBValue:\fP
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.PP
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.nf
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(__extension__({ \
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__asm__ __volatile__ \
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( \
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'movw r30, %A3\n\t' \
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'sts %1, %C3\n\t' \
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'sts %0, %2\n\t' \
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'spm\n\t' \
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: \
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: 'i' (_SFR_MEM_ADDR(__SPM_REG)), \
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'i' (_SFR_MEM_ADDR(RAMPZ)), \
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'r' ((uint8_t)__BOOT_PAGE_ERASE), \
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'r' ((uint32_t)address) \
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: 'r30', 'r31' \
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); \
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}))
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.fi
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.SS "#define __boot_page_erase_normal(address)"
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.PP
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\fBValue:\fP
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.PP
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.nf
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(__extension__({ \
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__asm__ __volatile__ \
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( \
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'sts %0, %1\n\t' \
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'spm\n\t' \
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: \
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: 'i' (_SFR_MEM_ADDR(__SPM_REG)), \
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'r' ((uint8_t)__BOOT_PAGE_ERASE), \
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'z' ((uint16_t)address) \
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); \
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}))
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.fi
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.SS "#define __boot_page_fill_alternate(address, data)"
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.PP
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\fBValue:\fP
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.PP
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.nf
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(__extension__({ \
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__asm__ __volatile__ \
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( \
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'movw r0, %3\n\t' \
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'sts %0, %1\n\t' \
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'spm\n\t' \
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'.word 0xffff\n\t' \
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'nop\n\t' \
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'clr r1\n\t' \
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: \
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: 'i' (_SFR_MEM_ADDR(__SPM_REG)), \
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'r' ((uint8_t)__BOOT_PAGE_FILL), \
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'z' ((uint16_t)address), \
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'r' ((uint16_t)data) \
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: 'r0' \
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); \
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}))
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.fi
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.SS "#define __boot_page_fill_extended(address, data)"
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.PP
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\fBValue:\fP
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.PP
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.nf
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(__extension__({ \
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__asm__ __volatile__ \
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( \
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'movw r0, %4\n\t' \
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'movw r30, %A3\n\t' \
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'sts %1, %C3\n\t' \
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'sts %0, %2\n\t' \
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'spm\n\t' \
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'clr r1\n\t' \
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: \
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: 'i' (_SFR_MEM_ADDR(__SPM_REG)), \
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'i' (_SFR_MEM_ADDR(RAMPZ)), \
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'r' ((uint8_t)__BOOT_PAGE_FILL), \
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'r' ((uint32_t)address), \
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'r' ((uint16_t)data) \
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: 'r0', 'r30', 'r31' \
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); \
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}))
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.fi
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.SS "#define __boot_page_fill_normal(address, data)"
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.PP
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\fBValue:\fP
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.PP
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.nf
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(__extension__({ \
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__asm__ __volatile__ \
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( \
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'movw r0, %3\n\t' \
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'sts %0, %1\n\t' \
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'spm\n\t' \
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'clr r1\n\t' \
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: \
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: 'i' (_SFR_MEM_ADDR(__SPM_REG)), \
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'r' ((uint8_t)__BOOT_PAGE_FILL), \
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'z' ((uint16_t)address), \
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'r' ((uint16_t)data) \
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: 'r0' \
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); \
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}))
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.fi
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.SS "#define __boot_page_write_alternate(address)"
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.PP
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\fBValue:\fP
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.PP
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.nf
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(__extension__({ \
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__asm__ __volatile__ \
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( \
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'sts %0, %1\n\t' \
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'spm\n\t' \
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'.word 0xffff\n\t' \
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'nop\n\t' \
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: \
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: 'i' (_SFR_MEM_ADDR(__SPM_REG)), \
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'r' ((uint8_t)__BOOT_PAGE_WRITE), \
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'z' ((uint16_t)address) \
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); \
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}))
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.fi
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.SS "#define __boot_page_write_extended(address)"
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.PP
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\fBValue:\fP
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.PP
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.nf
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(__extension__({ \
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__asm__ __volatile__ \
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( \
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'movw r30, %A3\n\t' \
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'sts %1, %C3\n\t' \
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'sts %0, %2\n\t' \
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'spm\n\t' \
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: \
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: 'i' (_SFR_MEM_ADDR(__SPM_REG)), \
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'i' (_SFR_MEM_ADDR(RAMPZ)), \
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'r' ((uint8_t)__BOOT_PAGE_WRITE), \
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'r' ((uint32_t)address) \
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: 'r30', 'r31' \
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); \
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}))
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.fi
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.SS "#define __boot_page_write_normal(address)"
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.PP
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\fBValue:\fP
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.PP
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.nf
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(__extension__({ \
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__asm__ __volatile__ \
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( \
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'sts %0, %1\n\t' \
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'spm\n\t' \
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: \
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: 'i' (_SFR_MEM_ADDR(__SPM_REG)), \
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'r' ((uint8_t)__BOOT_PAGE_WRITE), \
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'z' ((uint16_t)address) \
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); \
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}))
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.fi
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.SS "#define __boot_rww_enable()"
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.PP
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\fBValue:\fP
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.PP
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.nf
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(__extension__({ \
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__asm__ __volatile__ \
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( \
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'sts %0, %1\n\t' \
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'spm\n\t' \
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: \
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: 'i' (_SFR_MEM_ADDR(__SPM_REG)), \
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'r' ((uint8_t)__BOOT_RWW_ENABLE) \
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); \
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}))
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.fi
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.SS "#define __boot_rww_enable_alternate()"
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.PP
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\fBValue:\fP
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.PP
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.nf
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(__extension__({ \
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__asm__ __volatile__ \
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( \
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'sts %0, %1\n\t' \
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'spm\n\t' \
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'.word 0xffff\n\t' \
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'nop\n\t' \
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: \
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: 'i' (_SFR_MEM_ADDR(__SPM_REG)), \
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'r' ((uint8_t)__BOOT_RWW_ENABLE) \
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); \
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}))
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.fi
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.SH "Author"
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.PP
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Generated automatically by Doxygen for avr-libc from the source code.
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